patch r5900/micromips handling

["Jürgen Urban"]

Hello,

> Looks good, thanks.  Just a couple of minor things:
> 
> "Jürgen Urban" <JuergenUrban@gmx.de> writes:
> > +/* True, if CPU has support for ldc1 and sdc1. */
> > +#define CPU_HAS_LDC1_SDC1(CPU)	((mips_opts.isa != ISA_MIPS1) && ((CPU)
> != CPU_R5900))
> > +
> 
> Formatting, should be:
> 
> #define CPU_HAS_LDC1_SDC1(CPU) \
>   (mips_opts.isa != ISA_MIPS1 && (CPU) != CPU_R5900)
> 
> 
> >  /* True if mflo and mfhi can be immediately followed by instructions
> >     which write to the HI and LO registers.
> >  
> > @@ -9027,8 +9030,7 @@ macro (struct mips_cl_insn *ip)
> >        s = segment_name (S_GET_SEGMENT (offset_expr.X_add_symbol));
> >        if (strcmp (s, ".lit8") == 0)
> >  	{
> > -	  if ((mips_opts.isa != ISA_MIPS1 || mips_opts.micromips)
> > -	    && (mips_opts.arch != CPU_R5900))
> > +	  if (CPU_HAS_LDC1_SDC1(mips_opts.arch) || mips_opts.micromips)
> 
> Missing space before "(".  A few other cases.
> 
> > diff -Nurp
> binutils-cvs-20130104/gas/testsuite/gas/mips/24k-triple-stores-2.s
> binutils-cvs-20130104-mips64el-linux-patched/gas/testsuite/gas/mips/24k-triple-stores-2.s
> > ---
> binutils-cvs-20130104/gas/testsuite/gas/mips/24k-triple-stores-2.s	2013-01-26 18:28:08.503235967 +0100
> > +++
> binutils-cvs-20130104-mips64el-linux-patched/gas/testsuite/gas/mips/24k-triple-stores-2.s	2013-01-26 21:08:44.343223485 +0100
> > @@ -28,12 +28,6 @@ foo:
> >  	swl      $6,0($sp)
> >  	break
> >  
> > -	sc      $2,32($sp)
> > -	sc      $3,8($sp)
> > -	sc      $4,-8($sp)
> > -	sc      $5,0($sp)
> > -	sc      $6,32($sp)
> > -
> 
> Please remove the last "break" too, since it was there to separate
> groups of stores.

It is now fixed. The attached patch can be applied without the previous VU0 patch. ragnarok2040 will need more time fix the VU0 patch.

Best regards
Jürgen
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