[PATCH/AArch64 3/3] * opcodes/aarch64-tbl.h (aarch64_opcode_table): Add back the "lost" instruction aliases for scalar compare and vector compare.

Marcus Shawcroft marcus.shawcroft@gmail.com
Tue Dec 10 14:17:00 GMT 2013


On 4 December 2013 18:29, Philipp Tomsich
<philipp.tomsich@theobroma-systems.com> wrote:
> In v27 of the ARMv8 ISA various compare instructions were moved to new
> "Vector Compare" and "Scalar Compare" sections. However, some instructions
> were lost in this move.
>
> GCC still generates some of these instructions at -O3 when compiling SPECfp.
> This patch adds these aliases back to the assembler for consistency.

Hi, These mnemonics are no longer defined as architectural
instructions or aliases in the ISA.  There is work ongoing to define a
set of programmer convenience aliases that go beyond the
architecturally defined aliases and it is likely that these mnemonics
will be defined by that extension.

In the meantime binutils 2.23 and now the recently released 2.24 do
not support these mnemonics therefore gcc must not generate them and
will need fixing to emit the appropriate architecture instruction
instead.

Thanks
/Marcus



More information about the Binutils mailing list