[PATCH v2] arm: permit certain VMOV kinds without suffix

Jan Beulich JBeulich@suse.com
Tue Apr 9 09:51:00 GMT 2013


The specification explicitly permits VMOV without size/data type suffix for
the case of moving between scalar and core register. The easiest way to deal
with that appeared to be to fake the suffix if none was specified.

gas/
2013-04-09  Jan Beulich <jbeulich@suse.com>

	* gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
	if there was none specified for moves between scalar and core
	register.

gas/testsuite/
2013-04-09  Jan Beulich <jbeulich@suse.com>

	* gas/arm/neon-omit.s: Add tests for suffix less VMOV.
	* gas/arm/neon-omit.d: Update accordingly.

--- 2013-04-08/gas/config/tc-arm.c
+++ 2013-04-08/gas/config/tc-arm.c
@@ -15360,6 +15360,16 @@ do_neon_mov (void)
         unsigned dn = NEON_SCALAR_REG (inst.operands[0].reg);
         unsigned x = NEON_SCALAR_INDEX (inst.operands[0].reg);
 
+	/* .<size> is optional here, defaulting to .32. */
+	if (inst.vectype.elems == 0
+	    && inst.operands[0].vectype.type == NT_invtype
+	    && inst.operands[1].vectype.type == NT_invtype)
+	  {
+	    inst.vectype.el[0].type = NT_untyped;
+	    inst.vectype.el[0].size = 32;
+	    inst.vectype.elems = 1;
+	  }
+
         et = neon_check_type (2, NS_NULL, N_8 | N_16 | N_32 | N_KEY, N_EQK);
         logsize = neon_logbits (et.size);
 
@@ -15409,6 +15419,16 @@ do_neon_mov (void)
         unsigned x = NEON_SCALAR_INDEX (inst.operands[1].reg);
         unsigned abcdebits = 0;
 
+	/* .<dt> is optional here, defaulting to .32. */
+	if (inst.vectype.elems == 0
+	    && inst.operands[0].vectype.type == NT_invtype
+	    && inst.operands[1].vectype.type == NT_invtype)
+	  {
+	    inst.vectype.el[0].type = NT_untyped;
+	    inst.vectype.el[0].size = 32;
+	    inst.vectype.elems = 1;
+	  }
+
 	et = neon_check_type (2, NS_NULL,
 			      N_EQK, N_S8 | N_S16 | N_U8 | N_U16 | N_32 | N_KEY);
         logsize = neon_logbits (et.size);
--- 2013-04-08/gas/testsuite/gas/arm/neon-omit.d
+++ 2013-04-08/gas/testsuite/gas/arm/neon-omit.d
@@ -93,4 +93,6 @@ Disassembly of section .text:
 0[0-9a-f]+ <[^>]+> f3954556 	vsli\.16	q2, q3, #5
 0[0-9a-f]+ <[^>]+> f3bff6b7 	vqshlu\.s64	d15, d23, #63.*
 0[0-9a-f]+ <[^>]+> f2b25386 	vext\.8	d5, d18, d6, #3
+0[0-9a-f]+ <[^>]+> ee000b10 	vmov(\.32)?	d0\[0\], r0
+0[0-9a-f]+ <[^>]+> ee100b10 	vmov(\.32)?	r0, d0\[0\]
 0[0-9a-f]+ <[^>]+> f3020d54 	vmul\.f32	q0, q1, q2
--- 2013-04-08/gas/testsuite/gas/arm/neon-omit.s
+++ 2013-04-08/gas/testsuite/gas/arm/neon-omit.s
@@ -96,5 +96,10 @@
 	vqshlu.s64 d15,d23,#63
 	vext.8 d5,d18,d6,#3
 
+@ Also test VMOV with omitted suffix:
+
+	vmov d0[0], r0
+	vmov r0, d0[0]
+
 @ PR 11136 - this used to crash the assembler.
 	vmul.f32   q0,q1,q2



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