[PATCH] arm: allow SIMD instructions to be used without VFP support enabled

[Jan Beulich]

Instructions shared between VFP and SIMD so far got rejected after using

	.arch_extension simd
	.arch_extension nofp

because their table entries made them dependent on just VFP. Use a distinct
feature mask for them instead.

gas/
2013-04-08  Jan Beulich <jbeulich@suse.com>

	* gas/config/tc-arm.c (fpu_vfp_v1xd_or_neon_ext): New.
	(insns) Use fpu_vfp_v1xd_or_neon_ext.

--- 2013-04-08/gas/config/tc-arm.c
+++ 2013-04-08/gas/config/tc-arm.c
@@ -227,6 +227,8 @@ static const arm_feature_set fpu_vfp_ext
 static const arm_feature_set fpu_vfp_ext_d32 =
   ARM_FEATURE (0, FPU_VFP_EXT_D32);
 static const arm_feature_set fpu_neon_ext_v1 = ARM_FEATURE (0, FPU_NEON_EXT_V1);
+static const arm_feature_set fpu_vfp_v1xd_or_neon_ext =
+  ARM_FEATURE (0, FPU_NEON_EXT_V1 | FPU_VFP_EXT_V1xD);
 static const arm_feature_set fpu_vfp_v3_or_neon_ext =
   ARM_FEATURE (0, FPU_NEON_EXT_V1 | FPU_VFP_EXT_V3);
 static const arm_feature_set fpu_vfp_fp16 = ARM_FEATURE (0, FPU_VFP_EXT_FP16);
@@ -19200,6 +19202,11 @@ static const struct asm_opcode insns[] =
  NCE(vpop,      0,       1, (VRSDLST),          vfp_nsyn_pop),
  NCE(vcvtz,     0,       2, (RVSD, RVSD),       vfp_nsyn_cvtz),
 
+#undef  ARM_VARIANT
+#define ARM_VARIANT    & fpu_vfp_v1xd_or_neon_ext
+#undef  THUMB_VARIANT
+#define THUMB_VARIANT  & fpu_vfp_v1xd_or_neon_ext
+
   /* Mnemonics shared by Neon and VFP.  */
  nCEF(vmul,     _vmul,    3, (RNSDQ, oRNSDQ, RNSDQ_RNSC), neon_mul),
  nCEF(vmla,     _vmla,    3, (RNSDQ, oRNSDQ, RNSDQ_RNSC), neon_mac_maybe_scalar),



-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: binutils-mainline-arm-vfp-simd.patch
URL: <https://sourceware.org/pipermail/binutils/attachments/20130408/b605dc81/attachment.ksh>