what value the DWARF2_ADDR_SIZE should set to?

[Ramana]

Hi,

In my private port, the ELF target has 16 bit instruction space and
the instruction word width is 56 bits but to avoid bit streaming I am
treating it as a 64 bit instruction word in the binutils. Hence the
total addressable instruction memory should be 64K instruction words
== 512K Octets (as per 64 bit instruction word).

Also, since the target is of harward architecture, I am using bit
masking of MSB bits of address to differentiate code vs data
addresses. But because of this, for the linker, the total addressable
instruction memory is becoming full 32 bit range.

Now I am stuck with what values I should set for the bits_per_address
of 'struct bfd_arch_info_type' and also DWARF2_ADDR_SIZE?

Will the following combination work?
      bits_per_address = 19 so that the instruction memory range gets
truncated to the correct 512K Octets during relocations processing in
linker
      DWARF2_ADDR_SIZE = 4 so that the debug section relocation
records will have correct addresses (32 bit range due to MSBs bit
masking) until relocations are processed

Thanks in advance!

- Ram