[Patch, AArch64] Fix alignment check on load/store uimm12 offset

[Yufeng Zhang]

Hi,

This patch fixes the alignment check on the immediate offset of the 
load/store instructions with 12-bit unsigned immediate field.  It fixes 
the bug where e.g. ldr x0, [x0, #257] was silently assembled as ldr x0, 
[x0, #256].

Is it OK to commit?

Thanks,
Yufeng

opcodes/ChangeLog

         * aarch64-opc.c (operand_general_constraint_met_p): Change to check
         the alignment of addr.offset.imm instead of that of 
shifter.amount for
         operand type AARCH64_OPND_ADDR_UIMM12.

gas/testsuite/ChangeLog

         * gas/aarch64/illegal-2.s: Add test case.
         * gas/aarch64/illegal-2.l: Likewise.
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