m68hc11 - bug found with MOVW oprx16_xysp, oprx16_xysp1

James Murray jsm@jsm-net.demon.co.uk
Wed Nov 7 00:18:00 GMT 2012

Moves using 16bit indexed addressing generate incorrect code when using
an address known only at link time. This appears to be related to the
R_M68HC11_16B relocation.

Note that the gcc typically used for m68hc11/12/9s12x does not emit such
instructions. I've only tripped it with hand coded assembler.

$ cat test.s:
	.sect .text
	.globl main
	movw	gp_max_on,x, gp_clk,y

$ m68hc11-elf-objdump -d -m m9s12x -r test.o

   0:	18 02 e2 00 	movw	0x0,X, 0x0,Y
   4:	00 ea 00 00 
		2:R_M68HC12_16B	gp_max_on
		5:R_M68HC12_16B	gp_clk

The relocates are at the wrong offsets - should be 3 and 6. It then
produces scrambled code when linking.

I believe it to be caused by this section of code in

	      if ((mode & M6812_OP_IDX) && (current_architecture & cpu9s12x))
		  /* Must treat as a 16bit relocate as size of final result is
unknown.  */

		  byte <<= 3;
		  byte |= 0xe2;
		  number_to_chars_bigendian (f, byte, 1);
		  fix_new (frag_now, f - frag_now->fr_literal, 2,
			   sym, off, 0, BFD_RELOC_M68HC12_16B);
		  f = frag_more (2);
		  return 1;

I'll look into it some more when I get chance.


James Murray

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