[PATCH] opcodes: Don't disassemble STMFD/LDMIA sp!, {reg} to PUSH/POP

Meador Inge meadori@codesourcery.com
Mon May 7 16:04:00 GMT 2012


Ping ^ 2.

On 04/25/2012 10:14 AM, Meador Inge wrote:
> Ping.
> 
> On 04/18/2012 12:12 PM, Meador Inge wrote:
>> In the review for my change to emit A2 encodings for ARM PUSH/POP instructions
>> with a single register Richard Earnshaw noted that the disassembly of
>> STMFD/LDMIA sp!, {reg} instructions should not be disassembled to PUSH/POP
>> instructions.  This patch fixes that.
>>
>> Due to the table-driven architecture of the disassembler I had to enumerate
>> each single-register choice.  I didn't see a better way at least.
>>
>> Full test suite run for ARM EABI.  No regressions.  OK?
>>
>> P.S. If this is OK, then can someone commit for me?  I don't have write
>> access.
>>
>> opcodes/
>> 2012-04-18  Meador Inge  <meadori@codesourcery.com>
>>
>> 	* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
>> 	to PUSH/POP {reg}.
>>
>> binutils/testsuite/
>> 2012-04-18  Meador Inge  <meadori@codesourcery.com>
>>
>> 	* binutils-all/arm/objdump.exp:
>> 	STMFD/LDMIA sp!, {reg} don't disassemble to PUSH/POP {reg} any longer.
>>
>> gas/testsuite/
>> 2012-04-18  Meador Inge  <meadori@codesourcery.com>
>>
>> 	* gas/arm/stm-ldm.d: STMFD/LDMIA sp!, {reg} don't disassemble to
>> 	PUSH/POP {reg} any longer.  Some new test cases have been added as well.
>> 	* gas/arm/stm-ldm.s: Likewise.
>>
>> Signed-off-by: Meador Inge <meadori@codesourcery.com>
>> ---
>>  binutils/testsuite/binutils-all/arm/objdump.exp |    2 +-
>>  gas/testsuite/gas/arm/stm-ldm.d                 |   41 +++++++++++++++++++---
>>  gas/testsuite/gas/arm/stm-ldm.s                 |   32 ++++++++++++++++-
>>  opcodes/arm-dis.c                               |   34 +++++++++++++++++++
>>  4 files changed, 100 insertions(+), 9 deletions(-)
>>
>> diff --git a/binutils/testsuite/binutils-all/arm/objdump.exp b/binutils/testsuite/binutils-all/arm/objdump.exp
>> index 2b78db3..321e2a9 100644
>> --- a/binutils/testsuite/binutils-all/arm/objdump.exp
>> +++ b/binutils/testsuite/binutils-all/arm/objdump.exp
>> @@ -80,7 +80,7 @@ if [is_remote host] {
>>  
>>  set got [binutils_run $OBJDUMP "-dr $objfile $objfile"]
>>  
>> -set want "$objfile:\[ \]*file format.*$objfile:\[ \]*file format.*push.*add.*sub.*str.*add.*pop"
>> +set want "$objfile:\[ \]*file format.*$objfile:\[ \]*file format.*push.*add.*sub.*str.*add.*ldmfd"
>>  
>>  if [regexp $want $got] then {
>>      pass "multiple input files"
>> diff --git a/gas/testsuite/gas/arm/stm-ldm.d b/gas/testsuite/gas/arm/stm-ldm.d
>> index 564b8bc..3d940a5 100644
>> --- a/gas/testsuite/gas/arm/stm-ldm.d
>> +++ b/gas/testsuite/gas/arm/stm-ldm.d
>> @@ -1,14 +1,43 @@
>>  #objdump: -dr --prefix-addresses --show-raw-insn
>>  #name: STM and LDM
>> +#warning: writeback of base register when in register list is UNPREDICTABLE
>>  
>>  # Test the `STM*' and `LDM*' instructions
>>  
>>  .*: +file format .*arm.*
>>  
>>  Disassembly of section .text:
>> -0+000 <.*> e92d0001 	push	{r0}
>> -0+004 <.*> e92d000e 	push	{r1, r2, r3}
>> -0+008 <.*> e92d0200 	push	{r9}
>> -0+00c <.*> e8bd0200 	pop	{r9}
>> -0+010 <.*> e8bd000e 	pop	{r1, r2, r3}
>> -0+014 <.*> e8bd0001 	pop	{r0}
>> +0+000 <.*> e92d0001 	stmfd	sp!, {r0}
>> +0+004 <.*> e92d0002 	stmfd	sp!, {r1}
>> +0+008 <.*> e92d0004 	stmfd	sp!, {r2}
>> +0+00c <.*> e92d0008 	stmfd	sp!, {r3}
>> +0+010 <.*> e92d0010 	stmfd	sp!, {r4}
>> +0+014 <.*> e92d0020 	stmfd	sp!, {r5}
>> +0+018 <.*> e92d0040 	stmfd	sp!, {r6}
>> +0+01c <.*> e92d0080 	stmfd	sp!, {r7}
>> +0+020 <.*> e92d0100 	stmfd	sp!, {r8}
>> +0+024 <.*> e92d0200 	stmfd	sp!, {r9}
>> +0+028 <.*> e92d0400 	stmfd	sp!, {sl}
>> +0+02c <.*> e92d0800 	stmfd	sp!, {fp}
>> +0+030 <.*> e92d1000 	stmfd	sp!, {ip}
>> +0+034 <.*> e92d2000 	stmfd	sp!, {sp}
>> +0+038 <.*> e92d4000 	stmfd	sp!, {lr}
>> +0+03c <.*> e92d8000 	stmfd	sp!, {pc}
>> +0+040 <.*> e92d000e 	push	{r1, r2, r3}
>> +0+044 <.*> e8bd000e 	pop	{r1, r2, r3}
>> +0+048 <.*> e8bd0001 	ldmfd	sp!, {r0}
>> +0+04c <.*> e8bd0002 	ldmfd	sp!, {r1}
>> +0+050 <.*> e8bd0004 	ldmfd	sp!, {r2}
>> +0+054 <.*> e8bd0008 	ldmfd	sp!, {r3}
>> +0+058 <.*> e8bd0010 	ldmfd	sp!, {r4}
>> +0+05c <.*> e8bd0020 	ldmfd	sp!, {r5}
>> +0+060 <.*> e8bd0040 	ldmfd	sp!, {r6}
>> +0+064 <.*> e8bd0080 	ldmfd	sp!, {r7}
>> +0+068 <.*> e8bd0100 	ldmfd	sp!, {r8}
>> +0+06c <.*> e8bd0200 	ldmfd	sp!, {r9}
>> +0+070 <.*> e8bd0400 	ldmfd	sp!, {sl}
>> +0+074 <.*> e8bd0800 	ldmfd	sp!, {fp}
>> +0+078 <.*> e8bd1000 	ldmfd	sp!, {ip}
>> +0+07c <.*> e8bd2000 	ldmfd	sp!, {sp}
>> +0+080 <.*> e8bd4000 	ldmfd	sp!, {lr}
>> +0+084 <.*> e8bd8000 	ldmfd	sp!, {pc}
>> diff --git a/gas/testsuite/gas/arm/stm-ldm.s b/gas/testsuite/gas/arm/stm-ldm.s
>> index 77bbfbb..d35179d 100644
>> --- a/gas/testsuite/gas/arm/stm-ldm.s
>> +++ b/gas/testsuite/gas/arm/stm-ldm.s
>> @@ -1,8 +1,36 @@
>>  	.text
>>  	.syntax unified
>>  	stmfd	sp!, {r0}
>> -	stmfd	sp!, {r1, r2, r3}
>> +	stmfd	sp!, {r1}
>> +	stmfd	sp!, {r2}
>> +	stmfd	sp!, {r3}
>> +	stmfd	sp!, {r4}
>> +	stmfd	sp!, {r5}
>> +	stmfd	sp!, {r6}
>> +	stmfd	sp!, {r7}
>> +	stmfd	sp!, {r8}
>>  	stmfd	sp!, {r9}
>> -	ldmia sp!, {r9}
>> +	stmfd	sp!, {sl}
>> +	stmfd	sp!, {fp}
>> +	stmfd	sp!, {ip}
>> +	stmfd	sp!, {sp}
>> +	stmfd	sp!, {lr}
>> +	stmfd	sp!, {pc}
>> +	stmfd	sp!, {r1, r2, r3}
>>  	ldmia sp!, {r1, r2, r3}
>>  	ldmia sp!, {r0}
>> +	ldmia sp!, {r1}
>> +	ldmia sp!, {r2}
>> +	ldmia sp!, {r3}
>> +	ldmia sp!, {r4}
>> +	ldmia sp!, {r5}
>> +	ldmia sp!, {r6}
>> +	ldmia sp!, {r7}
>> +	ldmia sp!, {r8}
>> +	ldmia sp!, {r9}
>> +	ldmia sp!, {sl}
>> +	ldmia sp!, {fp}
>> +	ldmia sp!, {ip}
>> +	ldmia sp!, {sp}
>> +	ldmia sp!, {lr}
>> +	ldmia sp!, {pc}
>> diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
>> index 03062ad..66d85a9 100644
>> --- a/opcodes/arm-dis.c
>> +++ b/opcodes/arm-dis.c
>> @@ -1159,12 +1159,46 @@ static const struct opcode32 arm_opcodes[] =
>>    {ARM_EXT_V1, 0x04300000, 0x0d700000, "ldrt%c\t%12-15R, %a"},
>>    {ARM_EXT_V1, 0x04100000, 0x0c500000, "ldr%c\t%12-15r, %a"},
>>    
>> +  {ARM_EXT_V1, 0x092d0001, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d0002, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d0004, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d0008, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d0010, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d0020, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d0040, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d0080, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d0100, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d0200, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d0400, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d0800, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d1000, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d2000, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d4000, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x092d8000, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
>>    {ARM_EXT_V1, 0x092d0000, 0x0fff0000, "push%c\t%m"},
>>    {ARM_EXT_V1, 0x08800000, 0x0ff00000, "stm%c\t%16-19R%21'!, %m%22'^"},
>>    {ARM_EXT_V1, 0x08000000, 0x0e100000, "stm%23?id%24?ba%c\t%16-19R%21'!, %m%22'^"},
>> +
>> +  {ARM_EXT_V1, 0x08bd0001, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd0002, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd0004, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd0008, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd0010, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd0020, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd0040, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd0080, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd0100, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd0200, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd0400, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd0800, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd1000, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd2000, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd4000, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>> +  {ARM_EXT_V1, 0x08bd8000, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
>>    {ARM_EXT_V1, 0x08bd0000, 0x0fff0000, "pop%c\t%m"},
>>    {ARM_EXT_V1, 0x08900000, 0x0f900000, "ldm%c\t%16-19R%21'!, %m%22'^"},
>>    {ARM_EXT_V1, 0x08100000, 0x0e100000, "ldm%23?id%24?ba%c\t%16-19R%21'!, %m%22'^"},
>> +
>>    {ARM_EXT_V1, 0x0a000000, 0x0e000000, "b%24'l%c\t%b"},
>>    {ARM_EXT_V1, 0x0f000000, 0x0f000000, "svc%c\t%0-23x"},
>>  
> 
> 


-- 
Meador Inge
CodeSourcery / Mentor Embedded
http://www.mentor.com/embedded-software



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