[Patch, AArch64] [PING] Disassemble MOVZ, MOVN and ORR as MOV

[Yufeng Zhang]

Ping~

On 15/11/12 18:37, Yufeng Zhang wrote:
> Hi,
>
> This patch changes the AArch64 disassembler to disassemble MOVZ, MOVN
> and ORR (imm) as MOV where rules apply (for details, see 5.4.3.1 Move
> (immediate), ARMv8 Instruction Set Overview).
>
> The immediate value of the MOV alias is generally output in hex with
> decimal in comment, unless the corresponding machine instruction is a
> MOVZ/MOVN with shift == 0, in which case signed decimal is output with
> hex in comment.
>
> Is it OK to commit?
>
> Thanks,
> Yufeng
>
>
>
> include/opcode/
>
> 2012-11-15  Yufeng Zhang<yufeng.zhang@arm.com>
>
>           * aarch64.h (aarch64_opnd_info): Add bit-field 'otd_flag'.
>
> opcodes/
>
> 2012-11-15  Yufeng Zhang<yufeng.zhang@arm.com>
>
>           * aarch64-dis.c (convert_movewide_to_mov): Set 'otd_flag'.
>           * aarch64-opc.c (aarch64_print_operand): Change to print
>           AARCH64_OPND_IMM_MOV verbosely and in different formats
>           depending on the value of 'otd_flag'.
>           * aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag
>           from the opcode entries of OP_MOV_IMM_LOG, OP_MOV_IMM_WIDEN and
>           OP_MOV_IMM_WIDE.
>
> gas/testsuite/
>
> 2012-11-15  Yufeng Zhang<yufeng.zhang@arm.com>
>
>           * gas/aarch64/int-insns.d: Update.
>           * gas/aarch64/mov.d: Update.
>           * gas/aarch64/reloc-insn.d: Update.
>
> ld/testsuite/
>
> 2012-11-15  Yufeng Zhang<yufeng.zhang@arm.com>
>
>           * ld-aarch64/emit-relocs-264.d: Append the '-Mno-aliases' option to
>           the objdump directive.
>           * ld-aarch64/emit-relocs-266.d: Ditto.
>           * ld-aarch64/emit-relocs-268.d: Ditto.
>           * ld-aarch64/emit-relocs-269.d: Ditto.
>           * ld-aarch64/emit-relocs-270.d: Ditto.
>           * ld-aarch64/emit-relocs-271.d: Ditto.
>           * ld-aarch64/emit-relocs-272.d: Ditto.