[PATCH, v2]: AMD btver1 and btver2 enablement

[H.J. Lu]

On Mon, Aug 13, 2012 at 11:33 PM, Eggone, NagaJyothi
<NagaJyothi.Eggone@amd.com> wrote:
> Hello,
>
> I did not receive any reviews for the patch I submitted last week.
> I made some changes in the patch format and test files and am submitting again.
> Please review and if found OK, please commit the patch on my behalf.
>
> NOTE: I have omitted the diffs in the generated files opcodes/i386-init.h and opcodes/i386-tbl.h in the patch.
> So please use --enable-maintainer-mode to test the patch.
>
> Thanks,
> Nagajyothi
>
> ----------------------------------------------------------------------------------
> From: Eggone, NagaJyothi
> Sent: Thursday, August 09, 2012 2:35 PM
> To: binutils@sourceware.org
> Cc: Eggone, NagaJyothi
> Subject: [PATCH]:AMD btver1 and btver2 enablement
>
> Hello Maintainers,
>
> I have added the basic support for AMD's low power btver1 and btver2 cores.
> I have added the cpu_arch entries for btver1 and btver2, and defined respective CPU_BTVER*_FLAGS.
> As part of btver1 enablement, 3dnow instructions prefetch and prefetchw are also extended.
>
> I have tested on x86_64-unknown-linux-gnu. If it is OK for trunk, please commit on my behalf.
>
> NOTE: I have omitted the large diffs in the generated files opcodes/i386-init.h and opcodes/i386-tbl.h in the patch.
> So please use --enable-maintainer-mode to test the patch.
>
> Thanks,
> Nagajyothi

Do you really need Cpu3dnowPrfch? Where will it be used?

Also, please reformat your ChangeLog entries to follow
existing ones.

-- 
H.J.