[MIPS] Add saa and saad instructions for octeon
David Daney
ddaney@caviumnetworks.com
Tue Nov 15 17:43:00 GMT 2011
On 11/15/2011 09:12 AM, Richard Sandiford wrote:
> Richard Sandiford<rdsandiford@googlemail.com> writes:
>> Andrew Pinski<andrew.pinski@caviumnetworks.com> writes:
>>> Hi,
>>> This patch adds the saa and saad instructions for Octeon. They are
>>> not part of the original Octeon but are part of the Octeon+. We at
>>> Cavium don't feel the need to add a new arch for it since this is the
>>> only difference instruction wise and the original Octeon is no longer
>>> in production.
>>
>> I think it's still worth having a separate CPU name for it.
>
> and (to be clear) CPU enum, so that the instructions can be rejected
> for plain -march=octeon.
>
I guess that makes sense.
I don't think we want a separate E_MIPS_MACH_OCTEON?? tag in the ELF
flags EF_MIPS_MACH field for this though. The Cavium SDK toolchains
simply supply E_MIPS_MACH_OCTEON for all Octeon+ objects, and I would
like to keep it this way.
And just for the record, Octeon+ CPUs are still in production in several
different SOCs.
David Daney
More information about the Binutils
mailing list