[ARM] signed zero

Matthew Gretton-Dann matthew.gretton-dann@arm.com
Tue May 24 12:33:00 GMT 2011

On Tue, 2011-05-24 at 12:31 +0100, Nathan Sidwell wrote:
> On 05/24/11 12:08, Matthew Gretton-Dann wrote:
> > Looking at the source code and tests I think I agree with most of the
> > times you elide +0.  However, you seem to elide the offset when doing a
> > literal load (for instance ldr r0, [pc, #0] is being disassembled as ldr
> > r0, [pc]).  In this case I think the offset should be shown, and this is
> > also what the ARMARM does (see section A8.6.59 for example).
> I think those bits were Maciej's changes, for consistency with displaying the 
> same addressing mode with other base registers.  I'm not sure which version of 
> the ARM ARM you're looking at -- the one I have (ARM DDI 0100I) doesn't have a 
> section A8.

I'm looking at the v7-AR ARMARM (ARM DDI 0406B) - this is available on
the ARM documentation website (http://infocenter.arm.com/).



Matthew Gretton-Dann
Principal Engineer - PDSW Tools

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