[PATCH] Unwind info for PLT on i?86/x86_64

H.J. Lu hjl.tools@gmail.com
Mon Jun 20 17:14:00 GMT 2011


On Mon, Jun 20, 2011 at 6:02 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Mon, Jun 20, 2011 at 2:31 AM, Jakub Jelinek <jakub@redhat.com> wrote:
>> On Tue, Jun 14, 2011 at 10:18:44PM +0200, Jakub Jelinek wrote:
>>> Ok, here is a WIP patch which seems to work in light testing on x86_64.
>>> It doesn't have yet an option to force no generation of the unwind info,
>>> and some testcases (especially for TLS transitions) will either need
>>> to be adjusted or get passed the new option to prevent .eh_frame for
>>> .plt, as the 16 byte instead of 4 byte alignment of .plt section
>>> shifted various offsets in those.
>>
>> And here is an updated patch, this time for both i?86 and x86-64,
>> with an option to disable it (but the default being to emit
>> unwind info for ld generated code sections) and testsuite adjustments.
>>
>> Ok for trunk?
>>
>> 2011-06-20  Jakub Jelinek  <jakub@redhat.com>
>>
>> include/
>>        * bfdlink.h (struct bfd_link_info): Add no_ld_generated_unwind_info
>>        option.
>> ld/
>>        * emultempl/elf32.em (OPTION_LD_GENERATED_UNWIND_INFO,
>>        OPTION_NO_LD_GENERATED_UNWIND_INFO): Define.
>>        (gld${EMULATION_NAME}_handle_option): Handle
>>        --ld-generated-unwind-info and --no-ld-generated-unwind-info.
>>        * ld.texinfo (--ld-generated-unwind-info,
>>        --no-ld-generated-unwind-info): Document.
>> bfd/
>>        * elf-eh-frame.c (_bfd_elf_parse_eh_frame): Allow no relocations
>>        at all for linker created .eh_frame sections.
>
> Please mention PR ld/12570 in ChangeLogs
>
> http://sourceware.org/bugzilla/show_bug.cgi?id=12570
>
> Thanks.

I checked in this patch to adjust x86 IFUNC PLT.

-- 
H.J.
---
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 87fd182..d764ae4 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,5 +1,11 @@
 2011-06-20  H.J. Lu  <hongjiu.lu@intel.com>

+	* ld-ifunc/ifunc-1-local-x86.d: Adjusted.
+	* ld-ifunc/ifunc-1-x86.d: Likewise.
+	* ld-ifunc/ifunc-3a-x86.d: Likewise.
+
+2011-06-20  H.J. Lu  <hongjiu.lu@intel.com>
+
 	* ld-elf/eh1.d: Revert x32 change.
 	* ld-elf/eh2.d: Likewise.
 	* ld-elf/eh3.d: Likewise.
diff --git a/ld/testsuite/ld-ifunc/ifunc-1-local-x86.d
b/ld/testsuite/ld-ifunc/ifunc-1-local-x86.d
index 67ecdae..5408668 100644
--- a/ld/testsuite/ld-ifunc/ifunc-1-local-x86.d
+++ b/ld/testsuite/ld-ifunc/ifunc-1-local-x86.d
@@ -3,5 +3,5 @@
 #target: x86_64-*-* i?86-*-*

 #...
-[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x16c|\+0x200|)@plt>
+[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x170|\+0x200|)@plt>
 #pass
diff --git a/ld/testsuite/ld-ifunc/ifunc-1-x86.d
b/ld/testsuite/ld-ifunc/ifunc-1-x86.d
index 4142402..8d223db 100644
--- a/ld/testsuite/ld-ifunc/ifunc-1-x86.d
+++ b/ld/testsuite/ld-ifunc/ifunc-1-x86.d
@@ -3,5 +3,5 @@
 #target: x86_64-*-* i?86-*-*

 #...
-[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x184|\+0x220|)@plt>
+[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x190|\+0x220|)@plt>
 #pass
diff --git a/ld/testsuite/ld-ifunc/ifunc-3a-x86.d
b/ld/testsuite/ld-ifunc/ifunc-3a-x86.d
index bcfac6f..174999d 100644
--- a/ld/testsuite/ld-ifunc/ifunc-3a-x86.d
+++ b/ld/testsuite/ld-ifunc/ifunc-3a-x86.d
@@ -4,5 +4,5 @@
 #target: x86_64-*-* i?86-*-*

 #...
-[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x1a8|\+0x258|)@plt>
+[ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*(\+0x1b0|\+0x260|)@plt>
 #pass



More information about the Binutils mailing list