[PATCH] AMD bdver2 processors 1/2 - BMI
Quentin Neill
quentin.neill.gnu@gmail.com
Thu Jan 6 22:45:00 GMT 2011
On Thu, Jan 6, 2011 at 2:26 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Thu, Jan 6, 2011 at 12:20 PM, Quentin Neill
> <quentin.neill.gnu@gmail.com> wrote:
>> On Wed, Jan 5, 2011 at 12:22 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
>>> On Wed, Jan 5, 2011 at 9:41 AM, Quentin Neill
>>> <quentin.neill.gnu@gmail.com> wrote:
>>>> On Wed, Jan 5, 2011 at 11:33 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
>>>>> On Wed, Jan 5, 2011 at 8:45 AM, Quentin Neill
>>>>> <quentin.neill.gnu@gmail.com> wrote:
>>>>>> In i386-dis.c don't you need to order your REG_VEX enum and entry in
>>>>>> the reg_table (move REG_VEX_0F38F3 above REG_VEX_0FAE):
>>>>>> +++ b/opcodes/i386-dis.c
>>>>>> @@ -598,8 +598,8 @@ enum
>>>>>> REG_VEX_0F71,
>>>>>> REG_VEX_0F72,
>>>>>> REG_VEX_0F73,
>>>>>> - REG_VEX_0FAE,
>>>>>> REG_VEX_0F38F3,
>>>>>> + REG_VEX_0FAE,
>>>>>> REG_XOP_LWPCB,
>>>>>> REG_XOP_LWP
>>>>>> };
>>>>>
>>>>> I have
>>>>>
>>>>> REG_VEX_0F73,
>>>>> REG_VEX_0FAE,
>>>>> REG_VEX_0F38F3,
>>>>> REG_XOP_LWPCB,
>>>>> REG_XOP_LWP
>>>>>
>>>>> Please make sure your source is correct.
>>>>>
>>>>>
>>>>> --
>>>>> H.J.
>>>>
>>>> That was a small patch I proposed to move REG_VEX_0F38F3 above
>>>> REG_VEX_0FAE to make them numerically sorted.
>>>
>>> That is wrong. VEX opcodes are sorted by
>>>
>>> VEX_0FXX
>>> VEX_0F38XX
>>> VEX_0F3AXX
>>>
>>>
>>> --
>>> H.J.
>>>
>>
>> I also notice you did not implement ".bmi" cpu_arch entry in
>> tc-i386.c, can you comment on that?
>
> You should submit a new BMI patch minus what I have
> implemented for you.
>
>> Should I follow your lead concerning adding a ".tbm" directive?
>
> No.
>
>
> --
> H.J.
>
Patch adds BMI docs, .bmi arch directive and tests.
Passes "make -k check RUNTESTFLAGS=i386.exp", okay to commit?
--
Quentin
-------------- next part --------------
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 3177aa5..8d04da5 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2011-01-06 Quentin Neill <quentin.neill@amd.com>
+
+ * config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS.
+
+ * doc/c-i386.texi (i386-BMI): New section.
+
2011-01-06 Paul Koning <ni1d@arrl.net>
* config/tc-pdp11.c (parse_op_no_deferred): Allow PC-relative
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 2e28d8e..6f30dda 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -725,6 +725,8 @@ static const arch_entry cpu_arch[] =
CPU_SSE4A_FLAGS, 0, 0 },
{ STRING_COMMA_LEN (".abm"), PROCESSOR_UNKNOWN,
CPU_ABM_FLAGS, 0, 0 },
+ { STRING_COMMA_LEN (".bmi"), PROCESSOR_UNKNOWN,
+ CPU_BMI_FLAGS, 0, 0 },
};
#ifdef I386COFF
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 5c1c6bd..4ea33f6 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -35,6 +35,7 @@ extending the Intel architecture to 64-bits.
* i386-Float:: Floating Point
* i386-SIMD:: Intel's MMX and AMD's 3DNow! SIMD Operations
* i386-LWP:: AMD's Lightweight Profiling Instructions
+* i386-BMI:: Bit Manipulation Instruction
* i386-16bit:: Writing 16-bit Code
* i386-Arch:: Specifying an x86 CPU architecture
* i386-Bugs:: AT&T Syntax bugs
@@ -845,6 +846,21 @@ For detailed information on the LWP instruction set, see the
@cite{AMD Lightweight Profiling Specification} available at
@uref{http://developer.amd.com/cpu/LWP,Lightweight Profiling Specification}.
+@node i386-BMI
+@section Bit Manipulation Instructions
+
+@cindex BMI, i386
+@cindex BMI, x86-64
+
+@code{@value{AS}} supports the Bit Manipulation (BMI) instruction set.
+
+BMI instructions provide several instructions implementing individual
+bit manipulation operations such as isolation, masking, setting, or
+resetting.
+
+@c Need to add a specification citation here when available.
+
+
@node i386-16bit
@section Writing 16-bit Code
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d13c734..f87d642 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2011-01-06 Quentin Neill <quentin.neill@amd.com>
+
+ * gas/i386/arch-10.s: Add a BMI instruction.
+ * gas/i386/x86-64-arch-2.s: Likewise.
+ * gas/i386/arch-10.d: Add bmi flag and BMI instruction pattern.
+ * gas/i386/x86-64-arch-2.d: Likewise.
+ * gas/i386/arch-10-1.l: Add BMI instruction pattern.
+ * gas/i386/arch-10-2.l: Likewise.
+ * gas/i386/arch-10-3.l: Likewise.
+ * gas/i386/arch-10-4.l: Likewise.
+
2011-01-06 Paul Koning <ni1d@arrl.net>
* gas/pdp11/absreloc.s: New.
diff --git a/gas/testsuite/gas/i386/arch-10-1.l b/gas/testsuite/gas/i386/arch-10-1.l
index 0b78958..ee1e316 100644
--- a/gas/testsuite/gas/i386/arch-10-1.l
+++ b/gas/testsuite/gas/i386/arch-10-1.l
@@ -29,6 +29,7 @@
.*:58: Error: .*
.*:60: Error: .*
.*:62: Error: .*
+.*:64: Error: .*
GAS LISTING .*
@@ -98,3 +99,5 @@ GAS LISTING .*
[ ]*60[ ]+xstorerng
[ ]*61[ ]+\# nop
[ ]*62[ ]+nopl \(%eax\)
+[ ]*63[ ]+\# BMI
+[ ]*64[ ]+blsr %ecx,%ebx
diff --git a/gas/testsuite/gas/i386/arch-10-2.l b/gas/testsuite/gas/i386/arch-10-2.l
index d9e1b51..f1abcea 100644
--- a/gas/testsuite/gas/i386/arch-10-2.l
+++ b/gas/testsuite/gas/i386/arch-10-2.l
@@ -28,6 +28,7 @@
.*:58: Error: .*
.*:60: Error: .*
.*:62: Error: .*
+.*:64: Error: .*
GAS LISTING .*
@@ -97,3 +98,5 @@ GAS LISTING .*
[ ]*60[ ]+xstorerng
[ ]*61[ ]+\# nop
[ ]*62[ ]+nopl \(%eax\)
+[ ]*63[ ]+\# BMI
+[ ]*64[ ]+blsr %ecx,%ebx
diff --git a/gas/testsuite/gas/i386/arch-10-3.l b/gas/testsuite/gas/i386/arch-10-3.l
index 75c07ec..0b5d362 100644
--- a/gas/testsuite/gas/i386/arch-10-3.l
+++ b/gas/testsuite/gas/i386/arch-10-3.l
@@ -21,6 +21,7 @@
.*:58: Error: .*
.*:60: Error: .*
.*:62: Error: .*
+.*:64: Error: .*
GAS LISTING .*
@@ -93,3 +94,5 @@ GAS LISTING .*
[ ]*60[ ]+xstorerng
[ ]*61[ ]+\# nop
[ ]*62[ ]+nopl \(%eax\)
+[ ]*63[ ]+\# BMI
+[ ]*64[ ]+blsr %ecx,%ebx
diff --git a/gas/testsuite/gas/i386/arch-10-4.l b/gas/testsuite/gas/i386/arch-10-4.l
index 3c40045..8cca603 100644
--- a/gas/testsuite/gas/i386/arch-10-4.l
+++ b/gas/testsuite/gas/i386/arch-10-4.l
@@ -19,6 +19,7 @@
.*:58: Error: .*
.*:60: Error: .*
.*:62: Error: .*
+.*:64: Error: .*
GAS LISTING .*
@@ -91,3 +92,5 @@ GAS LISTING .*
[ ]*60[ ]+xstorerng
[ ]*61[ ]+\# nop
[ ]*62[ ]+nopl \(%eax\)
+[ ]*63[ ]+\# BMI
+[ ]*64[ ]+blsr %ecx,%ebx
diff --git a/gas/testsuite/gas/i386/arch-10.d b/gas/testsuite/gas/i386/arch-10.d
index 3efd52d..2225fe0 100644
--- a/gas/testsuite/gas/i386/arch-10.d
+++ b/gas/testsuite/gas/i386/arch-10.d
@@ -1,4 +1,4 @@
-#as: -march=i686+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+nop+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock
+#as: -march=i686+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+nop+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi
#objdump: -dw
#name: i386 arch 10
@@ -37,4 +37,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
+[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
#pass
diff --git a/gas/testsuite/gas/i386/arch-10.s b/gas/testsuite/gas/i386/arch-10.s
index d0fb12b..f39f70b 100644
--- a/gas/testsuite/gas/i386/arch-10.s
+++ b/gas/testsuite/gas/i386/arch-10.s
@@ -60,3 +60,5 @@ lzcnt %ecx,%ebx
xstorerng
# nop
nopl (%eax)
+# BMI
+blsr %ecx,%ebx
diff --git a/gas/testsuite/gas/i386/x86-64-arch-2.d b/gas/testsuite/gas/i386/x86-64-arch-2.d
index 9cd1306..ac09453 100644
--- a/gas/testsuite/gas/i386/x86-64-arch-2.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2.d
@@ -1,4 +1,4 @@
-#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock
+#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi
#objdump: -dw
#name: x86-64 arch 2
@@ -36,4 +36,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-arch-2.s b/gas/testsuite/gas/i386/x86-64-arch-2.s
index ddc0d40..962f15e 100644
--- a/gas/testsuite/gas/i386/x86-64-arch-2.s
+++ b/gas/testsuite/gas/i386/x86-64-arch-2.s
@@ -58,3 +58,5 @@ vmload
lzcnt %ecx,%ebx
# PadLock
xstorerng
+# BMI
+blsr %ecx,%ebx
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