[PATCH] Add MIPS32r2/MT ASE pause instruction

[Andrew Pinski]

Hi,
  This patch adds the MIPS32r2 (or MT  ASE) pause instruction.  Since
we already have an encoding in the micromips, nothing is needed to be
done there.

OK? Tested for mips64-linux-gnu with no regressions.

Thanks,
Andrew Pinski

opcodes/ChangeLog:
* mips-opc.c (mips_builtin_opcodes): Add "pause".

gas/testsuite/ChangeLog:
* gas/mips/mips32-mt.d: Add pause instruction encoding to the end.
* gas/mips/micromips@mips32r2.d: Likewise.
* gas/mips/mips32r2.d: Likewise.
* gas/mips/mips32-mt.s: Add pause instruction to the end.
* gas/mips/mips32r2.s: Likewise.
-------------- next part --------------
? gas/testsuite/gas/mips/.mips32-mt.d.swp
? opcodes/.mips-opc.c.swp
Index: gas/testsuite/gas/mips/micromips@mips32r2.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/micromips@mips32r2.d,v
retrieving revision 1.1
diff -u -p -r1.1 micromips@mips32r2.d
--- gas/testsuite/gas/mips/micromips@mips32r2.d	24 Jul 2011 14:20:09 -0000	1.1
+++ gas/testsuite/gas/mips/micromips@mips32r2.d	7 Dec 2011 22:39:49 -0000
@@ -41,4 +41,5 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 000a 577c 	ei	\$10
 [0-9a-f]+ <[^>]*> 0159 e17c 	rdpgpr	\$10,\$25
 [0-9a-f]+ <[^>]*> 0159 f17c 	wrpgpr	\$10,\$25
+[0-9a-f]+ <[^>]*> 0000 2800 	pause
 	\.\.\.
Index: gas/testsuite/gas/mips/mips32-mt.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips32-mt.d,v
retrieving revision 1.5
diff -u -p -r1.5 mips32-mt.d
--- gas/testsuite/gas/mips/mips32-mt.d	6 Feb 2008 05:29:03 -0000	1.5
+++ gas/testsuite/gas/mips/mips32-mt.d	7 Dec 2011 22:39:49 -0000
@@ -631,4 +631,5 @@ Disassembly of section .text:
 0+09b0 <[^>]*> 418d7035 	mttr	t5,t6,1,5,1
 0+09b4 <[^>]*> 418d7036 	mttr	t5,t6,1,6,1
 0+09b8 <[^>]*> 418d7037 	mttr	t5,t6,1,7,1
+0+09bc <[^>]*> 00000140 	pause
 	\.\.\.
Index: gas/testsuite/gas/mips/mips32-mt.s
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips32-mt.s,v
retrieving revision 1.2
diff -u -p -r1.2 mips32-mt.s
--- gas/testsuite/gas/mips/mips32-mt.s	5 Jun 2006 16:28:36 -0000	1.2
+++ gas/testsuite/gas/mips/mips32-mt.s	7 Dec 2011 22:39:50 -0000
@@ -630,5 +630,7 @@ text_label:
 	mttr		$13,$14,1,6,1
 	mttr		$13,$14,1,7,1
 
+	pause
+
 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
 	.space	8
Index: gas/testsuite/gas/mips/mips32r2.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips32r2.d,v
retrieving revision 1.5
diff -u -p -r1.5 mips32r2.d
--- gas/testsuite/gas/mips/mips32r2.d	7 Jul 2008 19:28:02 -0000	1.5
+++ gas/testsuite/gas/mips/mips32r2.d	7 Dec 2011 22:39:50 -0000
@@ -40,4 +40,5 @@ Disassembly of section .text:
 0+0078 <[^>]*> 416a6020 	ei	\$10
 0+007c <[^>]*> 41595000 	rdpgpr	\$10,\$25
 0+0080 <[^>]*> 41d95000 	wrpgpr	\$10,\$25
+0+0084 <[^>]*> 00000140 	pause
 	...
Index: gas/testsuite/gas/mips/mips32r2.s
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips32r2.s,v
retrieving revision 1.3
diff -u -p -r1.3 mips32r2.s
--- gas/testsuite/gas/mips/mips32r2.s	7 Jul 2008 19:28:02 -0000	1.3
+++ gas/testsuite/gas/mips/mips32r2.s	7 Dec 2011 22:39:50 -0000
@@ -63,5 +63,7 @@ text_label:
 
 	wrpgpr	$10, $25
 
+	pause
+
 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
 	.space  8
Index: opcodes/mips-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-opc.c,v
retrieving revision 1.89
diff -u -p -r1.89 mips-opc.c
--- opcodes/mips-opc.c	29 Nov 2011 20:28:55 -0000	1.89
+++ opcodes/mips-opc.c	7 Dec 2011 22:39:50 -0000
@@ -1169,6 +1169,7 @@ const struct mips_opcode mips_builtin_op
 {"ori",     "t,r,i",	0x34000000, 0xfc000000,	WR_t|RD_s,		0,		I1	},
 {"pabsdiff.ob", "X,Y,Q",0x78000009, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	0,		SB1	},
 {"pabsdiffc.ob", "Y,Q",	0x78000035, 0xfc2007ff,	RD_S|RD_T|FP_D,		WR_MACC,	SB1	},
+{"pause",   "",		0x00000140, 0xffffffff, TRAP,			0,		I33|MT32},
 {"pavg.ob", "X,Y,Q",	0x78000008, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	0,		SB1	},
 {"pickf.ob", "X,Y,Q",	0x78000002, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	0,		MX|SB1	},
 {"pickf.ob", "D,S,T",	0x4ac00002, 0xffe0003f,	WR_D|RD_S|RD_T,		0,		N54	},