[PATCH, ARM] MSR/MRS assembly and disassembly tweaks

[Tejas Belagod]

On Mon, 2011-04-04 at 15:07 +0100, Julian Brown wrote:
> Hi,
> 
> This patch improves handling of MSR and MRS instructions in GAS, and
> also improves disassembly output in a couple of cases.
> 
> In more detail:
> 
> 1. It should be possible to use APSR as a synonym for CPSR on e.g.
> ARMv7-A and ARMv7-R cores, but the current implementation assembles an
> MSR instruction with the "fc" fields set on such cores. I think this is
> wrong: I fixed it to only set the "f" field in such cases.
> 
> 2. Also in MSR instructions, "nzcvqg" bits can now be written in any
> order, to bring them in line with other PSR instructions (e.g. "msr
> CPSR_<fields>, rX", where <fields> can be in any order). You may only
> write "g" if the selected processor for assembly supports the DSP
> extension, else you will get an error.
> 

Hi Julian,

This patch seems to break one of the existing tests - msr-imm.s.
Basically it now thinks these instructions are illegal.

$ cat t.s

  .syntax unified
  
  msr APSR_nzcvqg, #0x00000004
  msr APSR_g, #0x00000000
  msr APSR_nzcvq, #0x00000004

$ as-new -march=armv7-a t.s 
t.s: Assembler messages:
t.s:5: Error: syntax error -- `msr APSR_nzcvqg,#0x00000004'
t.s:6: Error: syntax error -- `msr APSR_g,#0x00000000'
t.s:7: Error: syntax error -- `msr APSR_nzcvq,#0x00000004'


Tejas.