[PATCH, ARM] MSR/MRS assembly and disassembly tweaks

[Julian Brown]

Hi,

This patch improves handling of MSR and MRS instructions in GAS, and
also improves disassembly output in a couple of cases.

In more detail:

1. It should be possible to use APSR as a synonym for CPSR on e.g.
ARMv7-A and ARMv7-R cores, but the current implementation assembles an
MSR instruction with the "fc" fields set on such cores. I think this is
wrong: I fixed it to only set the "f" field in such cases.

2. Also in MSR instructions, "nzcvqg" bits can now be written in any
order, to bring them in line with other PSR instructions (e.g. "msr
CPSR_<fields>, rX", where <fields> can be in any order). You may only
write "g" if the selected processor for assembly supports the DSP
extension, else you will get an error.

3. Disassembling MSR instructions referring to IAPSR, EAPSR or XPSR now
shows bitfield syntax, "nzcvq" or "g". For APSR itself, the instruction
is still disassembled as CPSR_<fields> though, regardless of
architecture version.

4. BASEPRI_MASK is renamed to BASEPRI_MAX in disassembly (presumably
that was simply a typo).

5. Using plain "APSR" in MSR instructions (as an alias for "APSR_nzcvq")
is deprecated (DDI0403D_armv7m_arm.pdf, B5-799). I've implemented that
by emitting an assembler warning, but that might be a little too
aggressive.

6. VFP control registers are no longer accepted during parsing of
MSR/MRS. There's no testsuite coverage for that feature, and I'm not
sure what it was supposed to do. I didn't find any sign of it in the
ARM ARM, though I may have missed something.

I've added several new test cases to cover the modified functionality.
(Some may be a little redundant: I wrote this patch off an older branch
originally and didn't know about the new tests. They won't hurt though.)

OK to apply?

Thanks,

Julian

    ChangeLog

    gas/
    * config/tc-arm.c (parse_psr): Add LHS argument. Improve support
    for *APSR bitmasks.
    (operand_parse_code): Replace OP_PSR with OP_wPSR and OP_rPSR.
    Remove OP_RVC_PSR.
    (parse_operands): Likewise.
    (do_mrs): Tweak error message for constraint.
    (do_t_mrs): Update constraints for changes to APSR support.
    (do_t_msr): Likewise. Don't set PSR_f flag here.
    (psrs): Remove "g", "nzcvq", "nzcvqg".
    (insns): Tweak entries for msr and mrs instructions.

    opcodes/
    * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
    (print_insn_thumb32): Add APSR bitmask support.

    gas/testsuite/
    * gas/arm/mrs-msr-thumb-v7-m.s: New.
    * gas/arm/mrs-msr-thumb-v7-m.d: New.
    * gas/arm/mrs-msr-thumb-v7-m-bad.d: New.
    * gas/arm/mrs-msr-thumb-v7-m-bad.l: New.
    * gas/arm/mrs-msr-thumb-v7-m-bad.s: New.
    * gas/arm/mrs-msr-thumb-v7e-m.d: New.
    * gas/arm/mrs-msr-thumb-v7e-m.s: New.
    * gas/arm/mrs-msr-arm-v7-a-bad.d: New.
    * gas/arm/mrs-msr-arm-v7-a-bad.l: New.
    * gas/arm/mrs-msr-arm-v7-a-bad.s: New.
    * gas/arm/mrs-msr-arm-v7-a.d: New.
    * gas/arm/mrs-msr-arm-v7-a.s: New.
    * gas/arm/mrs-msr-arm-v6.d: New.
    * gas/arm/mrs-msr-arm-v6.s: New.
    * gas/arm/mrs-msr-thumb-v6t2.d: New.
    * gas/arm/mrs-msr-thumb-v6t2.s: New.
    * gas/arm/arch7.d: Fix typo in disassembly for BASEPRI_MAX,
    bitmasks for IAPSR etc.
    * gas/arm/arch7.s: Specify bitmask for APSR writes.
    * gas/arm/archv6m.s: Likewise.
    * msr-imm-bad.l: Tweak expected disassembly in error message.
    * msr-reg-bad.l: Likewise.
    * msr-imm.d: Tweak expected disassembly.
    * msr-reg.d: Likewise.
    * msr-reg-thumb.d: Likewise.
    * msr-imm.s: Specify bitmask on APSR writes.
    * msr-reg.s: Add comment about deprecated usage.
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