[Patch] [MIPS] Change opcode membership for the ssnop and ehb instructions
Maciej W. Rozycki
Tue May 25 02:08:00 GMT 2010
On Sun, 23 May 2010, Richard Sandiford wrote:
> > This patch changes the opcode membership for the ssnop instruction to
> > I1 from I32 | N55. It also changes the opcode membership of the ehb
> > instruction to I32 from I33. For those ASE's which don't support ehb
> > and/or ssnop, the instruction executes as a nop. This change make the
> > disassembly read more cleanly. Does this look okay to install?
> I'm not convinced this is a good idea. Do we really want:
> .set mips32
> to be acceptable?
Well, EHB is an assembly idiom for "SLL $0, $0, 3" and likewise SSNOP for
"SLL $0, $0, 1". Both instructions were chosen deliberately to execute
correctly back to the MIPS I ISA. I see no harm with assembling them and,
more importantly, they are much more readable in `objdump' or GDB where
you don't have the luxury of a per-instruction ISA annotation.
With an example hazard-clearing sequence like this:
ssnop; ssnop; ehb
(EHB executes as SSNOP on pre-MIPS-r2 processors) I see no gain with
interspersing this code with .set directives (or even wrapping it all).
What's the cause of your concern?
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