Scheduling x86 dispatch windows
Thu Jun 10 20:25:00 GMT 2010
Quoting Jeff Law <firstname.lastname@example.org>:
> That adds quite a bit of complication to the compiler though -- getting
> the instruction lengths right (and thus proper packing & alignment) can
> be extremely difficult. I did some experiments with this on a target
> with *fixed* instruction lengths a while back and even though the port
> tried hard to get lengths right, it would routinely miss something.
> Ultimately I decided that it forcing the compiler to know instruction
> lengths with a very high degree of accuracy wasn't a sane thing to do.
> Dealing with variable instruction lengths just adds yet another
> complexity to the situation. Then add the complication of needing to
> add specific prefixes or nops and it just gets downright ugly.
I did add alignment-aware & exact branch shortening to the ARCompact port,
but ultimately the added complexity due to this was also a factor why the
port couldn't go into mainline without an active maintainer.
The code is available on branches.
See PR target/39303.
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