Porting the linker

[Jean Christophe Beyler]

Dear all,

I'm currently maintaining a port of the binutils to an architecture
that I'm working on. However, I'm wrapping my mind behind what was
done and how it should be done now. My question is :

- My architecture has hierarchy memory (basically 3 levels)

- I am now working on the assembler and the problem is that I see this :

segT reg_section;
segT expr_section;
segT text_section;
segT data_section;
segT bss_section;

- However, technically, I'd have 3 sections for the data (both data
and bss) and 2 sections for text (1 level of the memory can't have
text). How do I explain this to the assembler ?

- Knowing that additionally, I'd need to have a system that overflows
if a smaller level is full

- Is there a correct way to do this without touching the internals of
the binutils that I'm missing or do I have to modify a bit it to make
it compatible to our architecture ?

Currently we modified the internals of the binutils but I'm not sure
this is the best solution.

Thanks for your help and input,
Jc