[PATCH, ARM] Fix Cortex-A8 erratum veneer alignment

[Julian Brown]

Hi,

This patch fixes an alignment issue which means that (under quite rare
circumstances) the veneers used for erratum workarounds in the linker
can be placed at insufficiently-aligned locations, causing predictable
chaos. This is a refinement to the fix mentioned in point (2) of the
message:

  http://sourceware.org/ml/binutils/2009-08/msg00041.html

In short, the one Cortex-A8 erratum workaround which uses ARM-mode code
will now be aligned to a four-byte boundary, whereas before it may have
landed only on a two-byte boundary.

Also the enumeration value arm_stub_a8_veneer_lwm (which would
otherwise have been orphaned by this patch) is used in preference to
arm_stub_a8_veneer_b_cond elsewhere: this leads to no change in
functionality, but is somewhat more meaningful in that context. I can
apply that change separately if desired.

OK to apply? Tested with cross to ARM Linux. The new test case passes
with the main (non-testsuite) part of the patch, and fails without it.

Julian

ChangeLog

    bfd/
    * elf32-arm.c (arm_stub_required_alignment): New.
    (arm_build_one_stub): Use above to partition stubs.
    (make_branch_to_a8_stub): Use arm_stub_a8_veneer_lwm not
    arm_stub_a8_veneer_b_cond.

    ld/testsuite/
    * ld-arm/arm-elf.exp (armelftests): Add cortex-a8-fix-blx-bcond.s.
    * ld-arm/cortex-a8-fix-blx-bcond.s: New.
    * ld-arm/cortex-a8-fix-blx-bcond.d: New.
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