[PATCH] Add XOP support for upcoming AMD Orochi processor

[Sebastian Pop]

On Tue, Nov 17, 2009 at 16:53, H.J. Lu <hjl.tools@gmail.com> wrote:
> -  /* Handle conversion of 'int $3' --> special int3 insn.  */
> -  if (i.tm.base_opcode == INT_OPCODE && i.op[0].imms->X_add_number == 3)
> +  /* Handle conversion of 'int $3' --> special int3 insn.  XOP or FMA4
> +     instructions may define INT_OPCODE as well, so avoid this corner
> +     case for those instructions that use MODRM.  */
> +  if (i.tm.base_opcode == INT_OPCODE && i.op[0].imms->X_add_number == 3
> +      && !i.tm.opcode_modifier.modrm)
>     {
>
> Please put each condition on a separate line.
>
> @@ -102,6 +102,8 @@ enum
>   CpuFMA,
>   /* FMA4 support required */
>   CpuFMA4,
> +  /* XOP support required */
> +  CpuXOP,
>   /* LWP support required */
>   CpuLWP,
>   /* MOVBE Instuction support required */
>
> There are more than one CPUID feature bit. Please create
> one CpuXXX field for each new CPUID feature bit and enable
> those instructions with that CpuXXX.
>

Fixed like this:

2009-11-17  Sebastian Pop  <sebastian.pop@amd.com>
	    Quentin Neill  <quentin.neill@amd.com>

	gas/
	* config/tc-i386.c (cpu_arch): Added .xop and .cvt16.
	(build_vex_prefix): Handle xop08.
	(md_assemble): Don't special case the constant 3 for insns using MODRM.
	(build_modrm_byte): Handle vex2sources.
	(md_show_usage): Add xop and cvt16.
	* doc/c-i386.texi: Document fma4, xop, and cvt16.

	gas/testsuite/
	* gas/i386/i386.exp: Run xop in 32-bit mode.
	Run x86-64-xop in 64-bit mode.
	* gas/i386/lwp.d: Update name of the testcase.
	* gas/i386/x86-64-xop.d: New.
	* gas/i386/x86-64-xop.s: New.
	* gas/i386/xop.d: New.
	* gas/i386/xop.s: New.

	opcodes/
	* i386-dis.c (OP_Vex_2src_1): New.
	(OP_Vex_2src_2): New.
	(Vex_2src_1): New.
	(Vex_2src_2): New.
	(XOP_08): Added.
	(VEX_LEN_XOP_08_A0): Added.
	(VEX_LEN_XOP_08_A1): Added.
	(VEX_LEN_XOP_09_80): Added.
	(VEX_LEN_XOP_09_81): Added.
	(xop_table): Added an entry for XOP_08.  Handle xop instructions.
	(vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
	VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
	(get_valid_dis386): Handle XOP_08.
	(OP_Vex_2src): New.
	* i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
	(cpu_flags): Add CpuXOP and CpuCVT16.
	(opcode_modifiers): Add XOP08, Vex2Sources.
	* i386-opc.h (CpuXOP): Added.
	(CpuCVT16): Added.
	(i386_cpu_flags): Add cpuxop and cpucvt16.
	(XOP08): Added.
	(Vex2Sources): Added.
	(i386_opcode_modifier): Add xop08, vex2sources.
	* i386-opc.tbl: Add entries for XOP and CVT16 instructions.

Tested on x86-64-linux with make -k check and on simnow.
Ok to commit?

Thanks,
Sebastian Pop
--
AMD / Open Source Compiler Engineering / GNU Tools
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