Not emitting "blx address" on Cortex-M3

[Samuel Tardieu]

The ARM Cortex-M3 which uses the thumb2 instruction set can use "blx
register" but not "blx address".

When compiling calls to GCC helper functions (here a soft-float division
between doubles), this instruction is generated:

        .cpu cortex-m3
        [...]
        bl      __aeabi_ddiv
        bx      lr

compiles as

   [...]
   108:   f7ff fffe       bl      0 <__aeabi_ddiv>
   10c:   4770            bx      lr

and after the link phase contains

    8170:       f000 e94a       blx     8408 <__aeabi_ddiv>
    8174:       4770            bx      lr

This "blx" instruction is incorrect. Is there an extra flag I can give
to "ld" to avoid the bl to blx transformation?

The "ld" command line was:

/arm/stm32/lib/gcc/arm-none-eabi/4.5.0/../../../../arm-none-eabi/bin/ld
--sysroot=/arm/stm32/arm-none-eabi/sys-root -X -o t
/arm/stm32/lib/gcc/arm-none-eabi/4.5.0/thumb/crti.o
/arm/stm32/lib/gcc/arm-none-eabi/4.5.0/thumb/crtbegin.o
/arm/stm32/lib/gcc/arm-none-eabi/4.5.0/../../../../arm-none-eabi/lib/thumb/crt0.o
-L/arm/stm32/lib/gcc/arm-none-eabi/4.5.0/thumb
-L/arm/stm32/lib/gcc/arm-none-eabi/4.5.0/../../../../arm-none-eabi/lib/thumb
-L/arm/stm32/lib/gcc/arm-none-eabi/4.5.0
-L/arm/stm32/lib/gcc/arm-none-eabi/4.5.0/../../../../arm-none-eabi/lib
/tmp/cconBGlK.o -v --start-group -lgcc -lc --end-group
/arm/stm32/lib/gcc/arm-none-eabi/4.5.0/thumb/crtend.o
/arm/stm32/lib/gcc/arm-none-eabi/4.5.0/thumb/crtn.o

GNU ld (GNU Binutils) 2.19.51.20090502

  Sam
-- 
Samuel Tardieu -- sam@rfc1149.net -- http://www.rfc1149.net/