[PATCH][ARM] Fix ARM stub misalignment problem caused by cortex-a8 erratum stubs.
Doug Kwan (關振德)
dougkwan@google.com
Fri Jul 31 00:23:00 GMT 2009
Hi,
This fixes a problem where cortex-a8 erratum stubs cause some ARM
stubs to be not 32-bit aligned. This is tested for arm-eabi on an
x86_64 hosts by running the linker tests.
-Doug
2009-07-30 Doug Kwan <dougkwan@google.com>
bfd/ChangeLog
* elf32-arm.c (arm_build_one_stub): Align section size increment by
8 byte.
(elf32_arm_size_stubs): Align cortex-a8 erratum stubs by 8 byte.
boundary.
ld/testsuite/ChangeLog
* ld-arm/arm-elf.exp: Add new test cortex-a8-fix-alignment
* ld-arm/cortex-a8-fix-alignment.d: New file
* ld-arm/cortex-a8-fix-alignment.s: New file
* ld-arm/cortex-a8-fix-alignment2.s: New file
* ld-arm/cortex-a8-fix-b-rel-thumb.d: Adjust test for new stub
alignment.
* ld-arm/cortex-a8-fix-b.d: Same.
* ld-arm/cortex-a8-fix-bcc-rel-thumb.d: Same.
* ld-arm/cortex-a8-fix-bcc.d: Same.
* ld-arm/cortex-a8-fix-bl-rel-arm.d: Same.
* ld-arm/cortex-a8-fix-bl-rel-thumb.d: Same.
* ld-arm/cortex-a8-fix-bl.d: Same.
* ld-arm/cortex-a8-fix-blx-rel-arm.d: Same.
* ld-arm/cortex-a8-fix-blx-rel-thumb.d: Same.
* ld-arm/cortex-a8-fix-blx.d: Same.
* ld-arm/farcall-group-size2.d: Same.
* ld-arm/farcall-group.d: Same.
* ld-arm/farcall-mix.d: Same.
* ld-arm/farcall-mix2.d: Same.
* ld-arm/farcall-mixed-lib.d: Same.
-------------- next part --------------
Index: bfd/elf32-arm.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-arm.c,v
retrieving revision 1.206
diff -u -p -r1.206 elf32-arm.c
--- bfd/elf32-arm.c 27 Jul 2009 23:04:05 -0000 1.206
+++ bfd/elf32-arm.c 30 Jul 2009 21:55:21 -0000
@@ -3514,7 +3514,7 @@ arm_build_one_stub (struct bfd_hash_entr
}
}
- stub_sec->size += size;
+ stub_sec->size += (size + 7) & ~7;
/* Stub size has already been computed in arm_size_one_stub. Check
consistency. */
@@ -4584,15 +4584,16 @@ elf32_arm_size_stubs (bfd *output_bfd,
if (htab->fix_cortex_a8)
for (i = 0; i < num_a8_fixes; i++)
{
+ int size;
stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
a8_fixes[i].section, htab);
if (stub_sec == NULL)
goto error_ret_free_local;
- stub_sec->size
- += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
- NULL);
+ size = find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
+ NULL);
+ stub_sec->size += (size + 7) & ~7;
}
Index: ld/testsuite/ld-arm/arm-elf.exp
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/arm-elf.exp,v
retrieving revision 1.59
diff -u -p -r1.59 arm-elf.exp
--- ld/testsuite/ld-arm/arm-elf.exp 22 May 2009 11:58:45 -0000 1.59
+++ ld/testsuite/ld-arm/arm-elf.exp 30 Jul 2009 21:55:24 -0000
@@ -205,6 +205,10 @@ set armelftests {
"-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-thumb-target.s cortex-a8-fix-blx-rel.s}
{{objdump -dr cortex-a8-fix-blx-rel-thumb.d}}
"cortex-a8-fix-blx-rel-thumb"}
+ {"Cortex-A8 erratum fix, stub alignment"
+ "-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-fix-alignment.s cortex-a8-fix-alignment2.s}
+ {{objdump -dr cortex-a8-fix-alignment.d}}
+ "cortex-a8-fix-alignment"}
{"Unwinding and -gc-sections" "-gc-sections" "" {gc-unwind.s}
{{objdump -sj.data gc-unwind.d}}
"gc-unwind"}
Index: ld/testsuite/ld-arm/cortex-a8-fix-alignment.d
===================================================================
RCS file: ld/testsuite/ld-arm/cortex-a8-fix-alignment.d
diff -N ld/testsuite/ld-arm/cortex-a8-fix-alignment.d
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-arm/cortex-a8-fix-alignment.d 30 Jul 2009 21:55:24 -0000
@@ -0,0 +1,96 @@
+
+.*: file format .*
+
+Disassembly of section .text:
+
+00008f00 <_start>:
+ 8f00: ea000042 b 9010 <__f1_from_arm>
+ 8f04: ea000047 b 9028 <__f2_from_arm>
+
+00008f08 <thumb2_fn>:
+ 8f08: bf00 nop
+ 8f0a: eb01 0002 add.w r0, r1, r2
+ 8f0e: f4ff affc bcc.w 8f0a <thumb2_fn\+0x2>
+ 8f12: eb01 0002 add.w r0, r1, r2
+ 8f16: f4ff aff8 bcc.w 8f0a <thumb2_fn\+0x2>
+ 8f1a: eb01 0002 add.w r0, r1, r2
+ 8f1e: f4ff aff4 bcc.w 8f0a <thumb2_fn\+0x2>
+ 8f22: eb01 0002 add.w r0, r1, r2
+ 8f26: f4ff aff0 bcc.w 8f0a <thumb2_fn\+0x2>
+ 8f2a: eb01 0002 add.w r0, r1, r2
+ 8f2e: f4ff affc bcc.w 8f2a <thumb2_fn\+0x22>
+ 8f32: eb01 0002 add.w r0, r1, r2
+ 8f36: f4ff aff8 bcc.w 8f2a <thumb2_fn\+0x22>
+ 8f3a: eb01 0002 add.w r0, r1, r2
+ 8f3e: f4ff aff4 bcc.w 8f2a <thumb2_fn\+0x22>
+ 8f42: eb01 0002 add.w r0, r1, r2
+ 8f46: f4ff aff0 bcc.w 8f2a <thumb2_fn\+0x22>
+ 8f4a: eb01 0002 add.w r0, r1, r2
+ 8f4e: f4ff affc bcc.w 8f4a <thumb2_fn\+0x42>
+ 8f52: eb01 0002 add.w r0, r1, r2
+ 8f56: f4ff aff8 bcc.w 8f4a <thumb2_fn\+0x42>
+ 8f5a: eb01 0002 add.w r0, r1, r2
+ 8f5e: f4ff aff4 bcc.w 8f4a <thumb2_fn\+0x42>
+ 8f62: eb01 0002 add.w r0, r1, r2
+ 8f66: f4ff aff0 bcc.w 8f4a <thumb2_fn\+0x42>
+ 8f6a: eb01 0002 add.w r0, r1, r2
+ 8f6e: f4ff affc bcc.w 8f6a <thumb2_fn\+0x62>
+ 8f72: eb01 0002 add.w r0, r1, r2
+ 8f76: f4ff aff8 bcc.w 8f6a <thumb2_fn\+0x62>
+ 8f7a: eb01 0002 add.w r0, r1, r2
+ 8f7e: f4ff aff4 bcc.w 8f6a <thumb2_fn\+0x62>
+ 8f82: eb01 0002 add.w r0, r1, r2
+ 8f86: f4ff aff0 bcc.w 8f6a <thumb2_fn\+0x62>
+ 8f8a: eb01 0002 add.w r0, r1, r2
+ 8f8e: f4ff affc bcc.w 8f8a <thumb2_fn\+0x82>
+ 8f92: eb01 0002 add.w r0, r1, r2
+ 8f96: f4ff aff8 bcc.w 8f8a <thumb2_fn\+0x82>
+ 8f9a: eb01 0002 add.w r0, r1, r2
+ 8f9e: f4ff aff4 bcc.w 8f8a <thumb2_fn\+0x82>
+ 8fa2: eb01 0002 add.w r0, r1, r2
+ 8fa6: f4ff aff0 bcc.w 8f8a <thumb2_fn\+0x82>
+ 8faa: eb01 0002 add.w r0, r1, r2
+ 8fae: f4ff affc bcc.w 8faa <thumb2_fn\+0xa2>
+ 8fb2: eb01 0002 add.w r0, r1, r2
+ 8fb6: f4ff aff8 bcc.w 8faa <thumb2_fn\+0xa2>
+ 8fba: eb01 0002 add.w r0, r1, r2
+ 8fbe: f4ff aff4 bcc.w 8faa <thumb2_fn\+0xa2>
+ 8fc2: eb01 0002 add.w r0, r1, r2
+ 8fc6: f4ff aff0 bcc.w 8faa <thumb2_fn\+0xa2>
+ 8fca: eb01 0002 add.w r0, r1, r2
+ 8fce: f4ff affc bcc.w 8fca <thumb2_fn\+0xc2>
+ 8fd2: eb01 0002 add.w r0, r1, r2
+ 8fd6: f4ff aff8 bcc.w 8fca <thumb2_fn\+0xc2>
+ 8fda: eb01 0002 add.w r0, r1, r2
+ 8fde: f4ff aff4 bcc.w 8fca <thumb2_fn\+0xc2>
+ 8fe2: eb01 0002 add.w r0, r1, r2
+ 8fe6: f4ff aff0 bcc.w 8fca <thumb2_fn\+0xc2>
+ 8fea: eb01 0002 add.w r0, r1, r2
+ 8fee: f4ff affc bcc.w 8fea <thumb2_fn\+0xe2>
+ 8ff2: eb01 0002 add.w r0, r1, r2
+ 8ff6: f4ff aff8 bcc.w 8fea <thumb2_fn\+0xe2>
+ 8ffa: eb01 0002 add.w r0, r1, r2
+ 8ffe: f000 b80b b.w 9018 <__f1_from_arm\+0x8>
+ 9002: eb01 0002 add.w r0, r1, r2
+ 9006: f4ff aff0 bcc.w 8fea <thumb2_fn\+0xe2>
+ 900a: 4770 bx lr
+
+0000900c <f1>:
+ 900c: 4770 bx lr
+
+0000900e <f2>:
+ 900e: 4770 bx lr
+
+.*[048c] <__f1_from_arm>:
+ .*: e51ff004 ldr pc, \[pc, #-4\] ;.*
+ .*: .*
+ .*: d301 bcc.n 901e <__f1_from_arm\+0xe>
+ .*: f7ff bff2 b.w 9002 <thumb2_fn\+0xfa>
+ .*: f7ff bfe4 b.w 8fea <thumb2_fn\+0xe2>
+ .*: 0000 lsls r0, r0, #0
+ .*: 0000 lsls r0, r0, #0
+ ...
+
+.*[048c] <__f2_from_arm>:
+ .*: e51ff004 ldr pc, \[pc, #-4\] ;.*
+ .*: .*
Index: ld/testsuite/ld-arm/cortex-a8-fix-alignment.s
===================================================================
RCS file: ld/testsuite/ld-arm/cortex-a8-fix-alignment.s
diff -N ld/testsuite/ld-arm/cortex-a8-fix-alignment.s
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-arm/cortex-a8-fix-alignment.s 30 Jul 2009 21:55:24 -0000
@@ -0,0 +1,11 @@
+ .syntax unified
+ .cpu cortex-a8
+ .text
+
+ .align 3
+ .global _start
+ .func
+ .type _start, %function
+_start:
+ b f1
+ b f2
Index: ld/testsuite/ld-arm/cortex-a8-fix-alignment2.s
===================================================================
RCS file: ld/testsuite/ld-arm/cortex-a8-fix-alignment2.s
diff -N ld/testsuite/ld-arm/cortex-a8-fix-alignment2.s
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-arm/cortex-a8-fix-alignment2.s 30 Jul 2009 21:55:24 -0000
@@ -0,0 +1,50 @@
+ .syntax unified
+ .cpu cortex-a8
+ .thumb
+ .text
+
+ @ expansion 32 bytes
+ .macro bw1
+1:
+ add.w r0, r1, r2
+ bcc.w 1b
+ add.w r0, r1, r2
+ bcc.w 1b
+ add.w r0, r1, r2
+ bcc.w 1b
+ add.w r0, r1, r2
+ bcc.w 1b
+ .endm
+
+ @ expansion 128 bytes
+ .macro bw2
+ bw1
+ bw1
+ bw1
+ bw1
+ .endm
+
+ .align 3
+ .thumb
+ .thumb_func
+ .type thumb2_fn, %function
+thumb2_fn:
+ nop
+
+ @ Trigger Cortex-A8 erratum workaround with conditional branches.
+ bw2
+ bw2
+
+ bx lr
+
+ .global f1
+ .thumb_func
+ .type f1, %function
+f1:
+ bx lr
+
+ .global f2
+ .thumb_func
+ .type f2, %function
+f2:
+ bx lr
Index: ld/testsuite/ld-arm/cortex-a8-fix-b-rel-thumb.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/cortex-a8-fix-b-rel-thumb.d,v
retrieving revision 1.1
diff -u -p -r1.1 cortex-a8-fix-b-rel-thumb.d
--- ld/testsuite/ld-arm/cortex-a8-fix-b-rel-thumb.d 22 May 2009 11:58:45 -0000 1.1
+++ ld/testsuite/ld-arm/cortex-a8-fix-b-rel-thumb.d 30 Jul 2009 21:55:24 -0000
@@ -78,3 +78,5 @@ Disassembly of section \.text:
900a: 4770 bx lr
900c: f3af 8000 nop\.w
9010: f7ff bf76 b\.w 8f00 <targetfn>
+ 9014: 0000 lsls r0, r0, #0
+ \.\.\.
Index: ld/testsuite/ld-arm/cortex-a8-fix-b.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/cortex-a8-fix-b.d,v
retrieving revision 1.1
diff -u -p -r1.1 cortex-a8-fix-b.d
--- ld/testsuite/ld-arm/cortex-a8-fix-b.d 22 May 2009 11:58:45 -0000 1.1
+++ ld/testsuite/ld-arm/cortex-a8-fix-b.d 30 Jul 2009 21:55:24 -0000
@@ -73,3 +73,5 @@ Disassembly of section \.text:
9002: 4770 bx lr
9004: f3af 8000 nop\.w
9008: f7ff bfeb b\.w 8fe2 <_start\+0xe2>
+ 900c: 0000 lsls r0, r0, #0
+ \.\.\.
Index: ld/testsuite/ld-arm/cortex-a8-fix-bcc-rel-thumb.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/cortex-a8-fix-bcc-rel-thumb.d,v
retrieving revision 1.1
diff -u -p -r1.1 cortex-a8-fix-bcc-rel-thumb.d
--- ld/testsuite/ld-arm/cortex-a8-fix-bcc-rel-thumb.d 22 May 2009 11:58:45 -0000 1.1
+++ ld/testsuite/ld-arm/cortex-a8-fix-bcc-rel-thumb.d 30 Jul 2009 21:55:24 -0000
@@ -80,3 +80,6 @@ Disassembly of section \.text:
9010: d401 bmi\.n 9016 <_start\+0x10e>
9012: f7ff bff6 b\.w 9002 <_start\+0xfa>
9016: f7ff bf73 b\.w 8f00 <targetfn>
+ 901a: 0000 lsls r0, r0, #0
+ 901c: 0000 lsls r0, r0, #0
+ \.\.\.
Index: ld/testsuite/ld-arm/cortex-a8-fix-bcc.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/cortex-a8-fix-bcc.d,v
retrieving revision 1.1
diff -u -p -r1.1 cortex-a8-fix-bcc.d
--- ld/testsuite/ld-arm/cortex-a8-fix-bcc.d 22 May 2009 11:58:45 -0000 1.1
+++ ld/testsuite/ld-arm/cortex-a8-fix-bcc.d 30 Jul 2009 21:55:24 -0000
@@ -75,3 +75,6 @@ Disassembly of section \.text:
9008: d301 bcc\.n 900e <_start\+0x10e>
900a: f7ff bffa b\.w 9002 <_start\+0x102>
900e: f7ff bfe8 b\.w 8fe2 <_start\+0xe2>
+ 9012: 0000 lsls r0, r0, #0
+ 9014: 0000 lsls r0, r0, #0
+ \.\.\.
Index: ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-arm.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-arm.d,v
retrieving revision 1.1
diff -u -p -r1.1 cortex-a8-fix-bl-rel-arm.d
--- ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-arm.d 22 May 2009 11:58:45 -0000 1.1
+++ ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-arm.d 30 Jul 2009 21:55:24 -0000
@@ -77,3 +77,4 @@ Disassembly of section \.text:
900a: 4770 bx lr
900c: f3af 8000 nop\.w
9010: eaffffba b 8f00 <targetfn>
+ 9014: 00000000 andeq r0, r0, r0
Index: ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-thumb.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-thumb.d,v
retrieving revision 1.1
diff -u -p -r1.1 cortex-a8-fix-bl-rel-thumb.d
--- ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-thumb.d 22 May 2009 11:58:45 -0000 1.1
+++ ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-thumb.d 30 Jul 2009 21:55:24 -0000
@@ -78,3 +78,5 @@ Disassembly of section \.text:
900a: 4770 bx lr
900c: f3af 8000 nop\.w
9010: f7ff bf76 b\.w 8f00 <targetfn>
+ 9014: 0000 lsls r0, r0, #0
+ \.\.\.
Index: ld/testsuite/ld-arm/cortex-a8-fix-bl.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/cortex-a8-fix-bl.d,v
retrieving revision 1.1
diff -u -p -r1.1 cortex-a8-fix-bl.d
--- ld/testsuite/ld-arm/cortex-a8-fix-bl.d 22 May 2009 11:58:45 -0000 1.1
+++ ld/testsuite/ld-arm/cortex-a8-fix-bl.d 30 Jul 2009 21:55:24 -0000
@@ -73,3 +73,5 @@ Disassembly of section \.text:
9002: 4770 bx lr
9004: f3af 8000 nop\.w
9008: f7ff bfeb b\.w 8fe2 <_start\+0xe2>
+ 900c: 0000 lsls r0, r0, #0
+ \.\.\.
Index: ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-arm.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-arm.d,v
retrieving revision 1.1
diff -u -p -r1.1 cortex-a8-fix-blx-rel-arm.d
--- ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-arm.d 22 May 2009 11:58:45 -0000 1.1
+++ ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-arm.d 30 Jul 2009 21:55:24 -0000
@@ -77,3 +77,4 @@ Disassembly of section \.text:
900a: 4770 bx lr
900c: f3af 8000 nop\.w
9010: eaffffba b 8f00 <targetfn>
+ 9014: 00000000 andeq r0, r0, r0
Index: ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-thumb.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-thumb.d,v
retrieving revision 1.1
diff -u -p -r1.1 cortex-a8-fix-blx-rel-thumb.d
--- ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-thumb.d 22 May 2009 11:58:45 -0000 1.1
+++ ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-thumb.d 30 Jul 2009 21:55:24 -0000
@@ -78,3 +78,5 @@ Disassembly of section \.text:
900a: 4770 bx lr
900c: f3af 8000 nop\.w
9010: f7ff bf76 b\.w 8f00 <targetfn>
+ 9014: 0000 lsls r0, r0, #0
+ ...
Index: ld/testsuite/ld-arm/cortex-a8-fix-blx.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/cortex-a8-fix-blx.d,v
retrieving revision 1.1
diff -u -p -r1.1 cortex-a8-fix-blx.d
--- ld/testsuite/ld-arm/cortex-a8-fix-blx.d 22 May 2009 11:58:45 -0000 1.1
+++ ld/testsuite/ld-arm/cortex-a8-fix-blx.d 30 Jul 2009 21:55:24 -0000
@@ -77,3 +77,4 @@ Disassembly of section \.text:
900a: 4770 bx lr
900c: f3af 8000 nop\.w
9010: eaffffba b 8f00 <armfn>
+ 9014: 00000000 andeq r0, r0, r0
Index: ld/testsuite/ld-arm/farcall-group-size2.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-group-size2.d,v
retrieving revision 1.4
diff -u -p -r1.4 farcall-group-size2.d
--- ld/testsuite/ld-arm/farcall-group-size2.d 21 Apr 2009 22:05:04 -0000 1.4
+++ ld/testsuite/ld-arm/farcall-group-size2.d 30 Jul 2009 21:55:24 -0000
@@ -5,32 +5,33 @@ Disassembly of section .text:
00001000 <_start>:
1000: eb000000 bl 1008 <__bar_from_arm>
- 1004: eb000002 bl 1014 <__bar2_veneer>
+ 1004: eb000003 bl 1018 <__bar2_veneer>
00001008 <__bar_from_arm>:
1008: e59fc000 ldr ip, \[pc, #0\] ; 1010 <__bar_from_arm\+0x8>
100c: e12fff1c bx ip
1010: 02003021 .word 0x02003021
-00001014 <__bar2_veneer>:
- 1014: e51ff004 ldr pc, \[pc, #-4\] ; 1018 <__bar2_veneer\+0x4>
- 1018: 02003024 .word 0x02003024
- 101c: 00000000 .word 0x00000000
+ 1014: 00000000 .word 0x00000000
+00001018 <__bar2_veneer>:
+ 1018: e51ff004 ldr pc, \[pc, #-4\] ; 101c <__bar2_veneer\+0x4>
+ 101c: 02003024 .word 0x02003024
00001020 <myfunc>:
- 1020: eb000008 bl 1048 <__bar3_veneer>
- 1024: eb000004 bl 103c <__bar4_from_arm>
+ 1020: eb00000a bl 1050 <__bar3_veneer>
+ 1024: eb000005 bl 1040 <__bar4_from_arm>
1028: eb000000 bl 1030 <__bar5_from_arm>
102c: 00000000 andeq r0, r0, r0
00001030 <__bar5_from_arm>:
1030: e59fc000 ldr ip, \[pc, #0\] ; 1038 <__bar5_from_arm\+0x8>
1034: e12fff1c bx ip
1038: 0200302f .word 0x0200302f
-0000103c <__bar4_from_arm>:
- 103c: e59fc000 ldr ip, \[pc, #0\] ; 1044 <__bar4_from_arm\+0x8>
- 1040: e12fff1c bx ip
- 1044: 0200302d .word 0x0200302d
-00001048 <__bar3_veneer>:
- 1048: e51ff004 ldr pc, \[pc, #-4\] ; 104c <__bar3_veneer\+0x4>
- 104c: 02003028 .word 0x02003028
- ...
+ 103c: 00000000 .word 0x00000000
+00001040 <__bar4_from_arm>:
+ 1040: e59fc000 ldr ip, \[pc, #0\] ; 1048 <__bar4_from_arm\+0x8>
+ 1044: e12fff1c bx ip
+ 1048: 0200302d .word 0x0200302d
+ 104c: 00000000 .word 0x00000000
+00001050 <__bar3_veneer>:
+ 1050: e51ff004 ldr pc, \[pc, #-4\] ; 1054 <__bar3_veneer\+0x4>
+ 1054: 02003028 .word 0x02003028
Disassembly of section .foo:
Index: ld/testsuite/ld-arm/farcall-group.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-group.d,v
retrieving revision 1.4
diff -u -p -r1.4 farcall-group.d
--- ld/testsuite/ld-arm/farcall-group.d 21 Apr 2009 22:05:04 -0000 1.4
+++ ld/testsuite/ld-arm/farcall-group.d 30 Jul 2009 21:55:24 -0000
@@ -4,12 +4,12 @@
Disassembly of section .text:
00001000 <_start>:
- 1000: eb00000c bl 1038 <__bar_from_arm>
- 1004: eb00000e bl 1044 <__bar2_veneer>
+ 1000: eb00000e bl 1040 <__bar_from_arm>
+ 1004: eb000011 bl 1050 <__bar2_veneer>
00001008 <myfunc>:
- 1008: eb000008 bl 1030 <__bar3_veneer>
- 100c: eb000004 bl 1024 <__bar4_from_arm>
+ 1008: eb00000a bl 1038 <__bar3_veneer>
+ 100c: eb000005 bl 1028 <__bar4_from_arm>
1010: eb000000 bl 1018 <__bar5_from_arm>
1014: 00000000 andeq r0, r0, r0
@@ -17,21 +17,24 @@ Disassembly of section .text:
1018: e59fc000 ldr ip, \[pc, #0\] ; 1020 <__bar5_from_arm\+0x8>
101c: e12fff1c bx ip
1020: 0200302f .word 0x0200302f
-00001024 <__bar4_from_arm>:
- 1024: e59fc000 ldr ip, \[pc, #0\] ; 102c <__bar4_from_arm\+0x8>
- 1028: e12fff1c bx ip
- 102c: 0200302d .word 0x0200302d
-00001030 <__bar3_veneer>:
- 1030: e51ff004 ldr pc, \[pc, #-4\] ; 1034 <__bar3_veneer\+0x4>
- 1034: 02003028 .word 0x02003028
-00001038 <__bar_from_arm>:
- 1038: e59fc000 ldr ip, \[pc, #0\] ; 1040 <__bar_from_arm\+0x8>
- 103c: e12fff1c bx ip
- 1040: 02003021 .word 0x02003021
-00001044 <__bar2_veneer>:
- 1044: e51ff004 ldr pc, \[pc, #-4\] ; 1048 <__bar2_veneer\+0x4>
- 1048: 02003024 .word 0x02003024
- ...
+ 1024: 00000000 .word 0x00000000
+00001028 <__bar4_from_arm>:
+ 1028: e59fc000 ldr ip, \[pc, #0\] ; 1030 <__bar4_from_arm\+0x8>
+ 102c: e12fff1c bx ip
+ 1030: 0200302d .word 0x0200302d
+ 1034: 00000000 .word 0x00000000
+00001038 <__bar3_veneer>:
+ 1038: e51ff004 ldr pc, \[pc, #-4\] ; 103c <__bar3_veneer\+0x4>
+ 103c: 02003028 .word 0x02003028
+00001040 <__bar_from_arm>:
+ 1040: e59fc000 ldr ip, \[pc, #0\] ; 1048 <__bar_from_arm\+0x8>
+ 1044: e12fff1c bx ip
+ 1048: 02003021 .word 0x02003021
+ 104c: 00000000 .word 0x00000000
+00001050 <__bar2_veneer>:
+ 1050: e51ff004 ldr pc, \[pc, #-4\] ; 1054 <__bar2_veneer\+0x4>
+ 1054: 02003024 .word 0x02003024
+
Disassembly of section .foo:
02003020 <bar>:
Index: ld/testsuite/ld-arm/farcall-mix.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-mix.d,v
retrieving revision 1.4
diff -u -p -r1.4 farcall-mix.d
--- ld/testsuite/ld-arm/farcall-mix.d 21 Apr 2009 22:05:04 -0000 1.4
+++ ld/testsuite/ld-arm/farcall-mix.d 30 Jul 2009 21:55:24 -0000
@@ -4,10 +4,10 @@
Disassembly of section .text:
00001000 <_start>:
- 1000: eb000009 bl 102c <__bar_from_arm>
- 1004: eb00000b bl 1038 <__bar2_veneer>
- 1008: eb000005 bl 1024 <__bar3_veneer>
- 100c: eb00000b bl 1040 <__bar4_from_arm>
+ 1000: eb00000a bl 1030 <__bar_from_arm>
+ 1004: eb00000d bl 1040 <__bar2_veneer>
+ 1008: eb000006 bl 1028 <__bar3_veneer>
+ 100c: eb00000d bl 1048 <__bar4_from_arm>
1010: eb000000 bl 1018 <__bar5_from_arm>
1014: 00000000 andeq r0, r0, r0
@@ -15,21 +15,24 @@ Disassembly of section .text:
1018: e59fc000 ldr ip, \[pc, #0\] ; 1020 <__bar5_from_arm\+0x8>
101c: e12fff1c bx ip
1020: 0200202f .word 0x0200202f
-00001024 <__bar3_veneer>:
- 1024: e51ff004 ldr pc, \[pc, #-4\] ; 1028 <__bar3_veneer\+0x4>
- 1028: 02002028 .word 0x02002028
-0000102c <__bar_from_arm>:
- 102c: e59fc000 ldr ip, \[pc, #0\] ; 1034 <__bar_from_arm\+0x8>
- 1030: e12fff1c bx ip
- 1034: 02002021 .word 0x02002021
-00001038 <__bar2_veneer>:
- 1038: e51ff004 ldr pc, \[pc, #-4\] ; 103c <__bar2_veneer\+0x4>
- 103c: 02002024 .word 0x02002024
-00001040 <__bar4_from_arm>:
- 1040: e59fc000 ldr ip, \[pc, #0\] ; 1048 <__bar4_from_arm\+0x8>
- 1044: e12fff1c bx ip
- 1048: 0200202d .word 0x0200202d
- ...
+ 1024: 00000000 .word 0x00000000
+00001028 <__bar3_veneer>:
+ 1028: e51ff004 ldr pc, \[pc, #-4\] ; 102c <__bar3_veneer\+0x4>
+ 102c: 02002028 .word 0x02002028
+00001030 <__bar_from_arm>:
+ 1030: e59fc000 ldr ip, \[pc, #0\] ; 1038 <__bar_from_arm\+0x8>
+ 1034: e12fff1c bx ip
+ 1038: 02002021 .word 0x02002021
+ 103c: 00000000 .word 0x00000000
+00001040 <__bar2_veneer>:
+ 1040: e51ff004 ldr pc, \[pc, #-4\] ; 1044 <__bar2_veneer\+0x4>
+ 1044: 02002024 .word 0x02002024
+00001048 <__bar4_from_arm>:
+ 1048: e59fc000 ldr ip, \[pc, #0\] ; 1050 <__bar4_from_arm\+0x8>
+ 104c: e12fff1c bx ip
+ 1050: 0200202d .word 0x0200202d
+ 1054: 00000000 .word 0x00000000
+
Disassembly of section .foo:
02002020 <bar>:
Index: ld/testsuite/ld-arm/farcall-mix2.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-mix2.d,v
retrieving revision 1.4
diff -u -p -r1.4 farcall-mix2.d
--- ld/testsuite/ld-arm/farcall-mix2.d 21 Apr 2009 22:05:04 -0000 1.4
+++ ld/testsuite/ld-arm/farcall-mix2.d 30 Jul 2009 21:55:24 -0000
@@ -5,35 +5,37 @@ Disassembly of section .text:
00001000 <_start>:
1000: eb000000 bl 1008 <__bar_from_arm>
- 1004: eb000002 bl 1014 <__bar2_veneer>
+ 1004: eb000003 bl 1018 <__bar2_veneer>
00001008 <__bar_from_arm>:
1008: e59fc000 ldr ip, \[pc, #0\] ; 1010 <__bar_from_arm\+0x8>
100c: e12fff1c bx ip
1010: 02003021 .word 0x02003021
-00001014 <__bar2_veneer>:
- 1014: e51ff004 ldr pc, \[pc, #-4\] ; 1018 <__bar2_veneer\+0x4>
- 1018: 02003024 .word 0x02003024
- 101c: 00000000 .word 0x00000000
+ 1014: 00000000 .word 0x00000000
+00001018 <__bar2_veneer>:
+ 1018: e51ff004 ldr pc, \[pc, #-4\] ; 101c <__bar2_veneer\+0x4>
+ 101c: 02003024 .word 0x02003024
Disassembly of section .mytext:
00002000 <__bar5_from_arm-0x10>:
- 2000: eb000008 bl 2028 <__bar3_veneer>
- 2004: eb000004 bl 201c <__bar4_from_arm>
+ 2000: eb00000a bl 2030 <__bar3_veneer>
+ 2004: eb000005 bl 2020 <__bar4_from_arm>
2008: eb000000 bl 2010 <__bar5_from_arm>
200c: 00000000 andeq r0, r0, r0
00002010 <__bar5_from_arm>:
2010: e59fc000 ldr ip, \[pc, #0\] ; 2018 <__bar5_from_arm\+0x8>
2014: e12fff1c bx ip
2018: 0200302f .word 0x0200302f
-0000201c <__bar4_from_arm>:
- 201c: e59fc000 ldr ip, \[pc, #0\] ; 2024 <__bar4_from_arm\+0x8>
- 2020: e12fff1c bx ip
- 2024: 0200302d .word 0x0200302d
-00002028 <__bar3_veneer>:
- 2028: e51ff004 ldr pc, \[pc, #-4\] ; 202c <__bar3_veneer\+0x4>
- 202c: 02003028 .word 0x02003028
- ...
+ 201c: 00000000 .word 0x00000000
+00002020 <__bar4_from_arm>:
+ 2020: e59fc000 ldr ip, \[pc, #0\] ; 2028 <__bar4_from_arm\+0x8>
+ 2024: e12fff1c bx ip
+ 2028: 0200302d .word 0x0200302d
+ 202c: 00000000 .word 0x00000000
+00002030 <__bar3_veneer>:
+ 2030: e51ff004 ldr pc, \[pc, #-4\] ; 2034 <__bar3_veneer\+0x4>
+ 2034: 02003028 .word 0x02003028
+
Disassembly of section .foo:
02003020 <bar>:
Index: ld/testsuite/ld-arm/farcall-mixed-lib.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-mixed-lib.d,v
retrieving revision 1.6
diff -u -p -r1.6 farcall-mixed-lib.d
--- ld/testsuite/ld-arm/farcall-mixed-lib.d 30 Jun 2009 11:57:05 -0000 1.6
+++ ld/testsuite/ld-arm/farcall-mixed-lib.d 30 Jul 2009 21:55:24 -0000
@@ -39,9 +39,9 @@ Disassembly of section .text:
.* <lib_func2>:
.*: f000 e80e blx 1000350 <__app_func_from_thumb>
- .*: f000 e818 blx 1000368 <__app_func_weak_from_thumb>
- .*: f000 e810 blx 100035c <__lib_func3_from_thumb>
- .*: f000 e81a blx 1000374 <__lib_func4_from_thumb>
+ .*: f000 e81c blx 1000370 <__app_func_weak_from_thumb>
+ .*: f000 e812 blx 1000360 <__lib_func3_from_thumb>
+ .*: f000 e820 blx 1000380 <__lib_func4_from_thumb>
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
@@ -55,25 +55,28 @@ Disassembly of section .text:
.*: e59fc000 ldr ip, \[pc, #0\] ; 1000358 <__app_func_from_thumb\+0x8>
.*: e08ff00c add pc, pc, ip
.*: feffff84 .word 0xfeffff84
+ .*: 00000000 .word 0x00000000
.* <__lib_func3_from_thumb>:
- .*: e59fc000 ldr ip, \[pc, #0\] ; 1000364 <__lib_func3_from_thumb\+0x8>
+ 1000360: e59fc000 ldr ip, \[pc, #0\] ; 1000368 <__lib_func3_from_thumb\+0x8>
.*: e08ff00c add pc, pc, ip
- .*: feffff90 .word 0xfeffff90
+ .*: feffff8c .word 0xfeffff8c
+ .*: 00000000 .word 0x00000000
.* <__app_func_weak_from_thumb>:
- .*: e59fc000 ldr ip, \[pc, #0\] ; 1000370 <__app_func_weak_from_thumb\+0x8>
+ .*: e59fc000 ldr ip, \[pc, #0\] ; 1000378 <__app_func_weak_from_thumb\+0x8>
.*: e08ff00c add pc, pc, ip
- .*: feffff78 .word 0xfeffff78
+ .*: feffff70 .word 0xfeffff70
+ .*: 00000000 .word 0x00000000
.* <__lib_func4_from_thumb>:
- .*: e59fc000 ldr ip, \[pc, #0\] ; 100037c <__lib_func4_from_thumb\+0x8>
+ .*: e59fc000 ldr ip, \[pc, #0\] ; 1000388 <__lib_func4_from_thumb\+0x8>
.*: e08ff00c add pc, pc, ip
- .*: feffff84 .word 0xfeffff84
+ .*: feffff78 .word 0xfeffff78
...
.* <lib_func3>:
- .*: f000 e80c blx 20003ac <__app_func_from_thumb>
+ .*: f000 e80e blx 20003b0 <__app_func_from_thumb>
.*: f000 e804 blx 20003a0 <__app_func_weak_from_thumb>
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
@@ -84,9 +87,10 @@ Disassembly of section .text:
.*: e59fc000 ldr ip, \[pc, #0\] ; 20003a8 <__app_func_weak_from_thumb\+0x8>
.*: e08ff00c add pc, pc, ip
.*: fdffff40 .word 0xfdffff40
+ .*: 00000000 .word 0x00000000
.* <__app_func_from_thumb>:
- .*: e59fc000 ldr ip, \[pc, #0\] ; 20003b4 <__app_func_from_thumb\+0x8>
+ .*: e59fc000 ldr ip, \[pc, #0\] ; 20003b8 <__app_func_from_thumb\+0x8>
.*: e08ff00c add pc, pc, ip
- .*: fdffff28 .word 0xfdffff28
- ...
+ .*: fdffff24 .word 0xfdffff24
+ .*: 00000000 .word 0x00000000
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