[PATCH, MIPS] Fix disasm of dm[ft]c2 for Octeon
Adam Nemet
anemet@caviumnetworks.com
Sat Feb 14 03:35:00 GMT 2009
When I added the Octeon variants of dm[ft]c2 instructions I only thought of
assembly when ordering the opcode table. Octeon has NO_ISA_COP defined so
architecture-level cop insns are ignored. Therefore it's OK to put the Octeon
variants after these.
However, NO_ISA_COP is only checked in the assembler so for certain operand
values the architecture-level opcodes can match and display the value as a
register with the optional sel field. The idea on Octeon to use the whole
16-bit field for the operand and display it as an constant ('i').
E.g. for the cases I am adding to the test before the patch we would
disassemble:
9c: 48260800 dmfc2 $6,$1
a0: 482c0001 dmfc2 $12,$0,1
after the patch we now get constant values for the second operand as can be
seen in the octeon.d changes.
octeon-ill.l needs adjustment because the error message is no longer printed
by the 'i' operand handler but by the generic code.
(Long term we should probably move is_opcode_valid into include/opcode/mips.h
or opcodes/mips-opc.c and get rid of OPCODE_IS_MEMBER.)
Tested with mips64octeon-linux.
OK to install?
Adam
opcodes/
* mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
dmfc2 and dmtc2 before the architecture-level variants.
gas/testsuite/
* gas/mips/octeon.s: Add more tests for dmfc2 and dmtc2.
* gas/mips/octeon.d: Update.
* gas/mips/octeon-ill.l: Update error messages.
Index: opcodes/mips-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-opc.c,v
retrieving revision 1.73
diff -F^\([(a-zA-Z0-9_]\|#define\) -u -p -r1.73 mips-opc.c
--- opcodes/mips-opc.c 3 Feb 2009 18:16:04 -0000 1.73
+++ opcodes/mips-opc.c 14 Feb 2009 02:56:28 -0000
@@ -1506,12 +1506,12 @@ const struct mips_opcode mips_builtin_op
{"bc2tl", "N,p", 0x49030000, 0xffe30000, CBL|RD_CC, 0, I32 },
{"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, 0, I1 },
{"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD|RD_t|WR_CC, 0, I1 },
+{"dmfc2", "t,i", 0x48200000, 0xffe00000, LCD|WR_t|RD_C2, 0, IOCT },
{"dmfc2", "t,G", 0x48200000, 0xffe007ff, LCD|WR_t|RD_C2, 0, I3 },
{"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD|WR_t|RD_C2, 0, I64 },
-{"dmfc2", "t,i", 0x48200000, 0xffe00000, LCD|WR_t|RD_C2, 0, IOCT },
+{"dmtc2", "t,i", 0x48a00000, 0xffe00000, COD|RD_t|WR_C2|WR_CC, 0, IOCT },
{"dmtc2", "t,G", 0x48a00000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, 0, I3 },
{"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, 0, I64 },
-{"dmtc2", "t,i", 0x48a00000, 0xffe00000, COD|RD_t|WR_C2|WR_CC, 0, IOCT },
{"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, 0, I1 },
{"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD|WR_t|RD_C2, 0, I32 },
{"mfhc2", "t,G", 0x48600000, 0xffe007ff, LCD|WR_t|RD_C2, 0, I33 },
Index: gas/testsuite/gas/mips/octeon.s
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/octeon.s,v
retrieving revision 1.4
diff -F^\([(a-zA-Z0-9_]\|#define\) -u -p -r1.4 octeon.s
--- gas/testsuite/gas/mips/octeon.s 7 Jul 2008 19:28:02 -0000 1.4
+++ gas/testsuite/gas/mips/octeon.s 14 Feb 2009 02:56:20 -0000
@@ -47,7 +47,11 @@ foo:
di
ei
dmfc2 $3,0x84
+ dmfc2 $6,0x800
+ dmfc2 $12,0x1
dmtc2 $8,0x4200
+ dmtc2 $7,0x2000
+ dmtc2 $2,0x4
mtm0 $26
mtm1 $19
Index: gas/testsuite/gas/mips/octeon.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/octeon.d,v
retrieving revision 1.5
diff -F^\([(a-zA-Z0-9_]\|#define\) -u -p -r1.5 octeon.d
--- gas/testsuite/gas/mips/octeon.d 27 Jan 2009 13:48:14 -0000 1.5
+++ gas/testsuite/gas/mips/octeon.d 14 Feb 2009 02:56:20 -0000
@@ -46,7 +46,11 @@ Disassembly of section .text:
.*: 41606000 di
.*: 41606020 ei
.*: 48230084 dmfc2 \$3,0x84
+.*: 48260800 dmfc2 \$6,0x800
+.*: 482c0001 dmfc2 \$12,0x1
.*: 48a84200 dmtc2 \$8,0x4200
+.*: 48a72000 dmtc2 \$7,0x2000
+.*: 48a20004 dmtc2 \$2,0x4
.*: 73400008 mtm0 \$26
.*: 7260000c mtm1 \$19
.*: 7240000d mtm2 \$18
Index: gas/testsuite/gas/mips/octeon-ill.l
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/octeon-ill.l,v
retrieving revision 1.4
diff -F^\([(a-zA-Z0-9_]\|#define\) -u -p -r1.4 octeon-ill.l
--- gas/testsuite/gas/mips/octeon-ill.l 22 Jul 2008 10:44:51 -0000 1.4
+++ gas/testsuite/gas/mips/octeon-ill.l 14 Feb 2009 02:56:20 -0000
@@ -28,11 +28,11 @@
.*:41: Error: opcode not supported on this processor.*
.*:42: Error: opcode not supported on this processor.*
.*:43: Error: opcode not supported on this processor.*
-.*:45: Error: expression out of range
-.*:46: Error: expression out of range
-.*:47: Error: register value used as expression
+.*:45: Error: illegal operands `dmfc2 \$2,0x10000'
+.*:46: Error: illegal operands `dmtc2 \$2,0x12345'
+.*:47: Error: illegal operands `dmfc2 \$9,\$12'
.*:48: Error: illegal operands `dmfc2 \$4,\$15,4'
-.*:49: Error: register value used as expression
+.*:49: Error: illegal operands `dmtc2 \$16,\$8'
.*:50: Error: illegal operands `dmtc2 \$22,\$7,\$4'
.*:52: Error: Improper size \(32\)
.*:54: Error: Improper position \(32\)
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