[PATCH] Utilize Blackfin L1 SRAM

[Jie Zhang]

Hi,

Blackfin processor has two high speed memories: L1 instruction SRAM and
L1 data SRAM, which work at core clock speed. To improve the
application performance, people may want to put their application in
these two SRAMs. This patch adds three options for this purpose.

--sep-code

It's a target independent option. Usually executable sections are put
into the same segment with other read only sections, like .rodata
section. However, the other read only sections cannot be put into L1
instruction SRAM, since this SRAM cannot be read with load instruction.
With this option, executable sections will be put into seperate
segments, which contains only code. Thus it can go into L1 instruction SRAM.

--code-in-l1 and --data-in-l1

They are Blackfin specific options. ld will set EF_BFIN_CODE_IN_L1 or
EF_BFIN_DATA_IN_L1 flag in the output file's elf header flags
respectively. These flags tells loader to put code or data into L1 SRAMs.


OK to add --sep-code option?



Jie


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