PATCH: Handle r12 like rsp

H.J. Lu hjl.tools@gmail.com
Fri Jan 25 22:10:00 GMT 2008


rsp/r12 are special when used in address. Disassembler handles
rsp as a special case. But it didn't treat r12 the same as rsp.
I am checking in this patch to fix it.


H.J.
---
gas/testsuite/

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-sib.s: Add tests for r12.

	* gas/i386/x86-64-sib-intel.d: Updated.
	* gas/i386/x86-64-sib.d: Likewise.

opcodes/

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.

--- binutils/gas/testsuite/gas/i386/x86-64-sib-intel.d.rex	2007-09-20 13:13:26.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86-64-sib-intel.d	2008-01-24 07:01:17.000000000 -0800
@@ -28,9 +28,16 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	8b 04 e3             	mov    eax,DWORD PTR \[rbx\+riz\*8\]
 [ 	]*[a-f0-9]+:	8b 04 24             	mov    eax,DWORD PTR \[rsp\]
 [ 	]*[a-f0-9]+:	8b 04 24             	mov    eax,DWORD PTR \[rsp\]
+[ 	]*[a-f0-9]+:	8b 04 24             	mov    eax,DWORD PTR \[rsp\]
 [ 	]*[a-f0-9]+:	8b 04 64             	mov    eax,DWORD PTR \[rsp\+riz\*2\]
 [ 	]*[a-f0-9]+:	8b 04 a4             	mov    eax,DWORD PTR \[rsp\+riz\*4\]
 [ 	]*[a-f0-9]+:	8b 04 e4             	mov    eax,DWORD PTR \[rsp\+riz\*8\]
+[ 	]*[a-f0-9]+:	41 8b 04 24          	mov    eax,DWORD PTR \[r12\]
+[ 	]*[a-f0-9]+:	41 8b 04 24          	mov    eax,DWORD PTR \[r12\]
+[ 	]*[a-f0-9]+:	41 8b 04 24          	mov    eax,DWORD PTR \[r12\]
+[ 	]*[a-f0-9]+:	41 8b 04 64          	mov    eax,DWORD PTR \[r12\+riz\*2\]
+[ 	]*[a-f0-9]+:	41 8b 04 a4          	mov    eax,DWORD PTR \[r12\+riz\*4\]
+[ 	]*[a-f0-9]+:	41 8b 04 e4          	mov    eax,DWORD PTR \[r12\+riz\*8\]
 [ 	]*[a-f0-9]+:	8b 04 25 e2 ff ff ff 	mov    eax,DWORD PTR ds:0xffffffffffffffe2
 [ 	]*[a-f0-9]+:	8b 04 65 e2 ff ff ff 	mov    eax,DWORD PTR \[riz\*2-0x1e\]
 [ 	]*[a-f0-9]+:	8b 04 a5 e2 ff ff ff 	mov    eax,DWORD PTR \[riz\*4-0x1e\]
@@ -50,4 +57,10 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	8b 04 64             	mov    eax,DWORD PTR \[rsp\+riz\*2\]
 [ 	]*[a-f0-9]+:	8b 04 a4             	mov    eax,DWORD PTR \[rsp\+riz\*4\]
 [ 	]*[a-f0-9]+:	8b 04 e4             	mov    eax,DWORD PTR \[rsp\+riz\*8\]
+[ 	]*[a-f0-9]+:	41 8b 04 24          	mov    eax,DWORD PTR \[r12\]
+[ 	]*[a-f0-9]+:	41 8b 04 24          	mov    eax,DWORD PTR \[r12\]
+[ 	]*[a-f0-9]+:	41 8b 04 24          	mov    eax,DWORD PTR \[r12\]
+[ 	]*[a-f0-9]+:	41 8b 04 64          	mov    eax,DWORD PTR \[r12\+riz\*2\]
+[ 	]*[a-f0-9]+:	41 8b 04 a4          	mov    eax,DWORD PTR \[r12\+riz\*4\]
+[ 	]*[a-f0-9]+:	41 8b 04 e4          	mov    eax,DWORD PTR \[r12\+riz\*8\]
 #pass
--- binutils/gas/testsuite/gas/i386/x86-64-sib.d.rex	2007-09-20 13:13:26.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86-64-sib.d	2008-01-24 07:01:36.000000000 -0800
@@ -27,9 +27,16 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	8b 04 e3             	mov    \(%rbx,%riz,8\),%eax
 [ 	]*[a-f0-9]+:	8b 04 24             	mov    \(%rsp\),%eax
 [ 	]*[a-f0-9]+:	8b 04 24             	mov    \(%rsp\),%eax
+[ 	]*[a-f0-9]+:	8b 04 24             	mov    \(%rsp\),%eax
 [ 	]*[a-f0-9]+:	8b 04 64             	mov    \(%rsp,%riz,2\),%eax
 [ 	]*[a-f0-9]+:	8b 04 a4             	mov    \(%rsp,%riz,4\),%eax
 [ 	]*[a-f0-9]+:	8b 04 e4             	mov    \(%rsp,%riz,8\),%eax
+[ 	]*[a-f0-9]+:	41 8b 04 24          	mov    \(%r12\),%eax
+[ 	]*[a-f0-9]+:	41 8b 04 24          	mov    \(%r12\),%eax
+[ 	]*[a-f0-9]+:	41 8b 04 24          	mov    \(%r12\),%eax
+[ 	]*[a-f0-9]+:	41 8b 04 64          	mov    \(%r12,%riz,2\),%eax
+[ 	]*[a-f0-9]+:	41 8b 04 a4          	mov    \(%r12,%riz,4\),%eax
+[ 	]*[a-f0-9]+:	41 8b 04 e4          	mov    \(%r12,%riz,8\),%eax
 [ 	]*[a-f0-9]+:	8b 04 25 e2 ff ff ff 	mov    0xffffffffffffffe2,%eax
 [ 	]*[a-f0-9]+:	8b 04 65 e2 ff ff ff 	mov    -0x1e\(,%riz,2\),%eax
 [ 	]*[a-f0-9]+:	8b 04 a5 e2 ff ff ff 	mov    -0x1e\(,%riz,4\),%eax
@@ -49,4 +56,10 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	8b 04 64             	mov    \(%rsp,%riz,2\),%eax
 [ 	]*[a-f0-9]+:	8b 04 a4             	mov    \(%rsp,%riz,4\),%eax
 [ 	]*[a-f0-9]+:	8b 04 e4             	mov    \(%rsp,%riz,8\),%eax
+[ 	]*[a-f0-9]+:	41 8b 04 24          	mov    \(%r12\),%eax
+[ 	]*[a-f0-9]+:	41 8b 04 24          	mov    \(%r12\),%eax
+[ 	]*[a-f0-9]+:	41 8b 04 24          	mov    \(%r12\),%eax
+[ 	]*[a-f0-9]+:	41 8b 04 64          	mov    \(%r12,%riz,2\),%eax
+[ 	]*[a-f0-9]+:	41 8b 04 a4          	mov    \(%r12,%riz,4\),%eax
+[ 	]*[a-f0-9]+:	41 8b 04 e4          	mov    \(%r12,%riz,8\),%eax
 #pass
--- binutils/gas/testsuite/gas/i386/x86-64-sib.s.rex	2007-09-20 13:13:26.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86-64-sib.s	2008-01-24 07:00:56.000000000 -0800
@@ -22,10 +22,17 @@ foo:
 	mov	(%rbx,%riz,4),%eax
 	mov	(%rbx,%riz,8),%eax
 	mov	(%rsp),%eax
+	mov	(%rsp,%riz),%eax
 	mov	(%rsp,%riz,1),%eax
 	mov	(%rsp,%riz,2),%eax
 	mov	(%rsp,%riz,4),%eax
 	mov	(%rsp,%riz,8),%eax
+	mov	(%r12),%eax
+	mov	(%r12,%riz),%eax
+	mov	(%r12,%riz,1),%eax
+	mov	(%r12,%riz,2),%eax
+	mov	(%r12,%riz,4),%eax
+	mov	(%r12,%riz,8),%eax
 	.intel_syntax noprefix
         mov    eax,DWORD PTR [riz*1-30]
         mov    eax,DWORD PTR [riz*2-30]
@@ -46,4 +53,9 @@ foo:
         mov    eax,DWORD PTR [rsp+riz*2]
         mov    eax,DWORD PTR [rsp+riz*4]
         mov    eax,DWORD PTR [rsp+riz*8]
-	.p2align 4
+        mov    eax,DWORD PTR [r12]
+        mov    eax,DWORD PTR [r12+riz]
+        mov    eax,DWORD PTR [r12+riz*1]
+        mov    eax,DWORD PTR [r12+riz*2]
+        mov    eax,DWORD PTR [r12+riz*4]
+        mov    eax,DWORD PTR [r12+riz*8]
--- binutils/opcodes/i386-dis.c.rex	2008-01-15 10:51:01.000000000 -0800
+++ binutils/opcodes/i386-dis.c	2008-01-24 06:51:29.000000000 -0800
@@ -6645,7 +6645,7 @@ OP_E_extended (int bytemode, int sizefla
       int havebase;
       int haveindex;
       int needindex;
-      int base;
+      int base, rbase;
       int index = 0;
       int scale = 0;
 
@@ -6667,7 +6667,7 @@ OP_E_extended (int bytemode, int sizefla
 	  haveindex = index != 4;
 	  codep++;
 	}
-      base += add;
+      rbase = base + add;
 
       /* If we have a DREX byte, skip it now 
 	 (it has already been handled) */
@@ -6680,7 +6680,7 @@ OP_E_extended (int bytemode, int sizefla
       switch (modrm.mod)
 	{
 	case 0:
-	  if ((base & 7) == 5)
+	  if (base == 5)
 	    {
 	      havebase = 0;
 	      if (address_mode == mode_64bit && !havesib)
@@ -6710,7 +6710,7 @@ OP_E_extended (int bytemode, int sizefla
 		  || (havesib && (haveindex || scale != 0)));
 
       if (!intel_syntax)
-	if (modrm.mod != 0 || (base & 7) == 5)
+	if (modrm.mod != 0 || base == 5)
 	  {
 	    if (havedisp || riprel)
 	      print_displacement (scratchbuf, disp);
@@ -6738,7 +6738,7 @@ OP_E_extended (int bytemode, int sizefla
 	  *obufp = '\0';
 	  if (havebase)
 	    oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
-		     ? names64[base] : names32[base]);
+		     ? names64[rbase] : names32[rbase]);
 	  if (havesib)
 	    {
 	      /* ESP/RSP won't allow index.  If base isn't ESP/RSP,
@@ -6769,7 +6769,7 @@ OP_E_extended (int bytemode, int sizefla
 		}
 	    }
 	  if (intel_syntax
-	      && (disp || modrm.mod != 0 || (base & 7) == 5))
+	      && (disp || modrm.mod != 0 || base == 5))
 	    {
 	      if (!havedisp || (bfd_signed_vma) disp >= 0)
 		{
@@ -6795,7 +6795,7 @@ OP_E_extended (int bytemode, int sizefla
 	}
       else if (intel_syntax)
 	{
-	  if (modrm.mod != 0 || (base & 7) == 5)
+	  if (modrm.mod != 0 || base == 5)
 	    {
 	      if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
 			      | PREFIX_ES | PREFIX_FS | PREFIX_GS))



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