[PATCH, MIPS] Add support for CPUs with no FPU

[Adam Nemet]

Richard Sandiford writes:
> Thanks for the patch.  It's certainly a lot cleaner than all those
> 4650 checks ;)

Thanks.

> If you have a toolchain that has both -mhard-float and -msoft-float
> libraries, I agree it does make sense for "target-gcc -march=foo"
> to select the right mode (for all of: compiling, assembling and
> multilib selection).  GCC 4.3 has a MIPS_ARCH_FLOAT_SPEC that
> configurations can use for this purpose.
> 
> But the assembler doesn't have much information.  I think it should
> continue to accept FPU insns unless the user explicitly says otherwise.

I agree that new behavior might be somewhat surprising on the more generic
config targets.  I'm certainly fine with keeping soft-float independent of the
CPU target assuming that we still have the option of building a soft-float
defaulted assembler for particular target configurations
(e.g. mips64octeon*-*-*).

Would it work for you if I added a new MIPS_DEFAULT_FP macro to configure
similar to the other MIPS_DEFAULT_* macros and then define that to soft-float
or single-float if one configures for an FPUless or single-float CPU target?

Adam