PATCH: PR 658: i386 assembler and disassembler can't handle SIB with INDEX==4
H.J. Lu
hjl@lucon.org
Thu Sep 20 01:11:00 GMT 2007
On Wed, Sep 19, 2007 at 03:26:19PM +0100, Jan Beulich wrote:
> >>> "H.J. Lu" <hjl@lucon.org> 19.09.07 16:19 >>>
> >On Wed, Sep 19, 2007 at 03:14:20PM +0100, Jan Beulich wrote:
> >> >
> >> >Adding ESIB to this list isn't a big surprise.
> >>
> >> How can you conclude this. MASM doesn't know a symbol like this, so a programmer
> >> may validly expect to be able to use it for his own purposes. Please avoid a future
> >> bug report due to this kind of addition.
> >
> >We can use .intel_syntax/.att_syntax directive to control this
> >feature, which is off by default.
>
> That's what I basically wanted.
>
It turns out that Intel assembler uses EIZ/RIZ as fake index
registers for this purpose. This patch adds a new directive,
.allow_index_reg, which will allow EIZ/RIZ as index registers.
Are there any comments?
Thanks.
H.J.
----
gas/
2007-09-19 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed.
(set_allow_index_reg): New.
(allow_index_reg): Likewise.
(md_pseudo_table): Add "allow_index_reg" and
"disallow_index_reg".
(build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for
fake index registers.
(i386_scale): Updated.
(i386_index_check): Support fake index registers.
(parse_real_register): Return NULL on eiz/riz if fake index
registers aren't allowed.
gas/testsuite/
2007-09-19 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* gas/i386/katmai.d: Updated.
* gas/i386/nops-1-i386-i686.d: Likewise.
* gas/i386/nops-1-i386.d: Likewise.
* gas/i386/nops-1.d: Likewise.
* gas/i386/nops-2-i386.d: Likewise.
* gas/i386/nops-2-merom.d: Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/nops-3-i386.d: Likewise.
* gas/i386/nops-3.d : Likewise.
* gas/i386/prescott.d: Likewise.
* gas/i386/sib.d: Likewise.
* gas/i386/sse2.d: Likewise.
* gas/i386/ssemmx2.d: Likewise.
* gas/i386/x86-64-addr32-intel.d: Likewise.
* gas/i386/x86-64-addr32.d: Likewise.
* gas/i386/x86-64-prescott.d: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/sib.s: Use %eiz in testcases.
ld/testsuite/
2007-09-19 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* ld-i386/tlsbin.dd: Updated.
* ld-i386/tlsld1.dd: Likewise.
* ld-x86-64/tlsbin.dd: Likewise.
* ld-x86-64/tlsbindesc.dd: Likewise.
* ld-x86-64/tlsdesc.dd: Likewise.
* ld-x86-64/tlsgd1.dd: Likewise.
* ld-x86-64/tlsgdesc.dd: Likewise.
* ld-x86-64/tlsld1.dd: Likewise.
* ld-x86-64/tlspic.dd: Likewise.
opcodes/
2007-09-19 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* 386-dis.c (index64): New.
(index32): Likewise.
(intel_index64): Likewise.
(intel_index32): Likewise.
(att_index64): Likewise.
(att_index32): Likewise.
(print_insn): Set index64 and index32.
(OP_E_extended): Use index64/index32 for index register for
SIB with INDEX == 4.
* i386-opc.h (RegEiz): New.
(RegRiz): Likewise.
* i386-reg.tbl: Add eiz and riz.
* i386-tbl.h: Regenerated.
--- binutils/gas/config/tc-i386.c.fake 2007-09-19 10:01:40.000000000 -0700
+++ binutils/gas/config/tc-i386.c 2007-09-19 14:21:24.000000000 -0700
@@ -43,14 +43,6 @@
#define INFER_ADDR_PREFIX 1
#endif
-#ifndef SCALE1_WHEN_NO_INDEX
-/* Specifying a scale factor besides 1 when there is no index is
- futile. eg. `mov (%ebx,2),%al' does exactly the same as
- `mov (%ebx),%al'. To slavishly follow what the programmer
- specified, set SCALE1_WHEN_NO_INDEX to 0. */
-#define SCALE1_WHEN_NO_INDEX 1
-#endif
-
#ifndef DEFAULT_ARCH
#define DEFAULT_ARCH "i386"
#endif
@@ -66,6 +58,7 @@
static void set_code_flag (int);
static void set_16bit_gcc_code_flag (int);
static void set_intel_syntax (int);
+static void set_allow_index_reg (int);
static void set_cpu_arch (int);
#ifdef TE_PE
static void pe_directive_secrel (int);
@@ -294,6 +287,9 @@ static int intel_syntax = 0;
/* 1 if register prefix % not required. */
static int allow_naked_reg = 0;
+/* 1 if fake index register, eiz/riz, is allowed . */
+static int allow_index_reg = 0;
+
/* Register prefix used for error message. */
static const char *register_prefix = "%";
@@ -539,6 +535,8 @@ const pseudo_typeS md_pseudo_table[] =
{"code64", set_code_flag, CODE_64BIT},
{"intel_syntax", set_intel_syntax, 1},
{"att_syntax", set_intel_syntax, 0},
+ {"allow_index_reg", set_allow_index_reg, 1},
+ {"disallow_index_reg", set_allow_index_reg, 0},
#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
{"largecomm", handle_large_common, 0},
#else
@@ -1508,6 +1506,12 @@ set_intel_syntax (int syntax_flag)
}
static void
+set_allow_index_reg (int flag)
+{
+ allow_index_reg = flag;
+}
+
+static void
set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
{
SKIP_WHITESPACE ();
@@ -4517,7 +4521,11 @@ build_modrm_byte (void)
}
else /* !i.base_reg && i.index_reg */
{
- i.sib.index = i.index_reg->reg_num;
+ if (i.index_reg->reg_num == RegEiz
+ || i.index_reg->reg_num == RegRiz)
+ i.sib.index = NO_INDEX_REGISTER;
+ else
+ i.sib.index = i.index_reg->reg_num;
i.sib.base = NO_BASE_REGISTER;
i.sib.scale = i.log2_scale_factor;
i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
@@ -4625,16 +4633,14 @@ build_modrm_byte (void)
Any base register besides %esp will not use the
extra modrm byte. */
i.sib.index = NO_INDEX_REGISTER;
-#if !SCALE1_WHEN_NO_INDEX
- /* Another case where we force the second modrm
- byte. */
- if (i.log2_scale_factor)
- i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
-#endif
}
else
{
- i.sib.index = i.index_reg->reg_num;
+ if (i.index_reg->reg_num == RegEiz
+ || i.index_reg->reg_num == RegRiz)
+ i.sib.index = NO_INDEX_REGISTER;
+ else
+ i.sib.index = i.index_reg->reg_num;
i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
if ((i.index_reg->reg_flags & RegRex) != 0)
i.rex |= REX_X;
@@ -5740,9 +5746,7 @@ i386_scale (char *scale)
{
as_warn (_("scale factor of %d without an index register"),
1 << i.log2_scale_factor);
-#if SCALE1_WHEN_NO_INDEX
i.log2_scale_factor = 0;
-#endif
}
scale = input_line_pointer;
input_line_pointer = save;
@@ -5980,8 +5984,11 @@ i386_index_check (const char *operand_st
|| (i.index_reg
&& (!i.index_reg->reg_type.bitfield.baseindex
|| (i.prefix[ADDR_PREFIX] == 0
- && !i.index_reg->reg_type.bitfield.reg64)
+ && i.index_reg->reg_num != RegRiz
+ && !i.index_reg->reg_type.bitfield.reg64
+ )
|| (i.prefix[ADDR_PREFIX]
+ && i.index_reg->reg_num != RegEiz
&& !i.index_reg->reg_type.bitfield.reg32))))
ok = 0;
}
@@ -6008,7 +6015,8 @@ i386_index_check (const char *operand_st
if ((i.base_reg
&& !i.base_reg->reg_type.bitfield.reg32)
|| (i.index_reg
- && (!i.index_reg->reg_type.bitfield.reg32
+ && ((!i.index_reg->reg_type.bitfield.reg32
+ && i.index_reg->reg_num != RegEiz)
|| !i.index_reg->reg_type.bitfield.baseindex)))
ok = 0;
}
@@ -6904,6 +6912,12 @@ parse_real_register (char *reg_string, c
}
}
+ /* Don't allow fake index register unless allow_index_reg isn't 0. */
+ if (r != NULL
+ && !allow_index_reg
+ && (r->reg_num == RegEiz || r->reg_num == RegRiz))
+ return (const reg_entry *) NULL;
+
if (r != NULL
&& ((r->reg_flags & (RegRex64 | RegRex))
|| r->reg_type.bitfield.reg64)
--- binutils/gas/testsuite/gas/i386/katmai.d.fake 2007-08-29 08:43:38.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/katmai.d 2007-09-19 14:52:53.000000000 -0700
@@ -17,7 +17,7 @@ Disassembly of section .text:
1b: 0f c2 c1 02 [ ]*cmpleps %xmm1,%xmm0
1f: 0f c2 0a 03 [ ]*cmpunordps \(%edx\),%xmm1
23: f3 0f c2 d2 04 [ ]*cmpneqss %xmm2,%xmm2
- 28: f3 0f c2 1c 24 05 [ ]*cmpnltss \(%esp\),%xmm3
+ 28: f3 0f c2 1c 24 05 [ ]*cmpnltss \(%esp,%eiz,1\),%xmm3
2e: 0f c2 e5 06 [ ]*cmpnleps %xmm5,%xmm4
32: 0f c2 2e 07 [ ]*cmpordps \(%esi\),%xmm5
36: f3 0f c2 f7 00 [ ]*cmpeqss %xmm7,%xmm6
@@ -25,7 +25,7 @@ Disassembly of section .text:
40: 0f c2 c1 00 [ ]*cmpeqps %xmm1,%xmm0
44: 0f c2 0a 00 [ ]*cmpeqps \(%edx\),%xmm1
48: f3 0f c2 d2 00 [ ]*cmpeqss %xmm2,%xmm2
- 4d: f3 0f c2 1c 24 00 [ ]*cmpeqss \(%esp\),%xmm3
+ 4d: f3 0f c2 1c 24 00 [ ]*cmpeqss \(%esp,%eiz,1\),%xmm3
53: 0f c2 e5 01 [ ]*cmpltps %xmm5,%xmm4
57: 0f c2 2e 01 [ ]*cmpltps \(%esi\),%xmm5
5b: f3 0f c2 f7 01 [ ]*cmpltss %xmm7,%xmm6
@@ -41,7 +41,7 @@ Disassembly of section .text:
8a: 0f c2 c1 04 [ ]*cmpneqps %xmm1,%xmm0
8e: 0f c2 0a 04 [ ]*cmpneqps \(%edx\),%xmm1
92: f3 0f c2 d2 04 [ ]*cmpneqss %xmm2,%xmm2
- 97: f3 0f c2 1c 24 04 [ ]*cmpneqss \(%esp\),%xmm3
+ 97: f3 0f c2 1c 24 04 [ ]*cmpneqss \(%esp,%eiz,1\),%xmm3
9d: 0f c2 e5 05 [ ]*cmpnltps %xmm5,%xmm4
a1: 0f c2 2e 05 [ ]*cmpnltps \(%esi\),%xmm5
a5: f3 0f c2 f7 05 [ ]*cmpnltss %xmm7,%xmm6
@@ -57,7 +57,7 @@ Disassembly of section .text:
d4: 0f 2f c1 [ ]*comiss %xmm1,%xmm0
d7: 0f 2f 0a [ ]*comiss \(%edx\),%xmm1
da: 0f 2a d3 [ ]*cvtpi2ps %mm3,%xmm2
- dd: 0f 2a 1c 24 [ ]*cvtpi2ps \(%esp\),%xmm3
+ dd: 0f 2a 1c 24 [ ]*cvtpi2ps \(%esp,%eiz,1\),%xmm3
e1: f3 0f 2a e5 [ ]*cvtsi2ss %ebp,%xmm4
e5: f3 0f 2a 2e [ ]*cvtsi2ss \(%esi\),%xmm5
e9: 0f 2d f7 [ ]*cvtps2pi %xmm7,%mm6
@@ -71,14 +71,14 @@ Disassembly of section .text:
106: 0f 5e c1 [ ]*divps %xmm1,%xmm0
109: 0f 5e 0a [ ]*divps \(%edx\),%xmm1
10c: f3 0f 5e d3 [ ]*divss %xmm3,%xmm2
- 110: f3 0f 5e 1c 24 [ ]*divss \(%esp\),%xmm3
+ 110: f3 0f 5e 1c 24 [ ]*divss \(%esp,%eiz,1\),%xmm3
115: 0f ae 55 00 [ ]*ldmxcsr 0x0\(%ebp\)
119: 0f ae 1e [ ]*stmxcsr \(%esi\)
11c: 0f ae f8 [ ]*sfence
11f: 0f 5f c1 [ ]*maxps %xmm1,%xmm0
122: 0f 5f 0a [ ]*maxps \(%edx\),%xmm1
125: f3 0f 5f d3 [ ]*maxss %xmm3,%xmm2
- 129: f3 0f 5f 1c 24 [ ]*maxss \(%esp\),%xmm3
+ 129: f3 0f 5f 1c 24 [ ]*maxss \(%esp,%eiz,1\),%xmm3
12e: 0f 5d e5 [ ]*minps %xmm5,%xmm4
131: 0f 5d 2e [ ]*minps \(%esi\),%xmm5
134: f3 0f 5d f7 [ ]*minss %xmm7,%xmm6
@@ -87,7 +87,7 @@ Disassembly of section .text:
13f: 0f 29 11 [ ]*movaps %xmm2,\(%ecx\)
142: 0f 28 12 [ ]*movaps \(%edx\),%xmm2
145: 0f 16 dc [ ]*movlhps %xmm4,%xmm3
- 148: 0f 17 2c 24 [ ]*movhps %xmm5,\(%esp\)
+ 148: 0f 17 2c 24 [ ]*movhps %xmm5,\(%esp,%eiz,1\)
14c: 0f 16 2e [ ]*movhps \(%esi\),%xmm5
14f: 0f 12 f7 [ ]*movhlps %xmm7,%xmm6
152: 0f 13 07 [ ]*movlps %xmm0,\(%edi\)
@@ -102,7 +102,7 @@ Disassembly of section .text:
171: 0f 59 c1 [ ]*mulps %xmm1,%xmm0
174: 0f 59 0a [ ]*mulps \(%edx\),%xmm1
177: f3 0f 59 d2 [ ]*mulss %xmm2,%xmm2
- 17b: f3 0f 59 1c 24 [ ]*mulss \(%esp\),%xmm3
+ 17b: f3 0f 59 1c 24 [ ]*mulss \(%esp,%eiz,1\),%xmm3
180: 0f 56 e5 [ ]*orps %xmm5,%xmm4
183: 0f 56 2e [ ]*orps \(%esi\),%xmm5
186: 0f 53 f7 [ ]*rcpps %xmm7,%xmm6
@@ -118,7 +118,7 @@ Disassembly of section .text:
1ab: 0f 51 c1 [ ]*sqrtps %xmm1,%xmm0
1ae: 0f 51 0a [ ]*sqrtps \(%edx\),%xmm1
1b1: f3 0f 51 d2 [ ]*sqrtss %xmm2,%xmm2
- 1b5: f3 0f 51 1c 24 [ ]*sqrtss \(%esp\),%xmm3
+ 1b5: f3 0f 51 1c 24 [ ]*sqrtss \(%esp,%eiz,1\),%xmm3
1ba: 0f 5c e5 [ ]*subps %xmm5,%xmm4
1bd: 0f 5c 2e [ ]*subps \(%esi\),%xmm5
1c0: f3 0f 5c f7 [ ]*subss %xmm7,%xmm6
@@ -134,14 +134,14 @@ Disassembly of section .text:
1e1: 0f e0 c1 [ ]*pavgb %mm1,%mm0
1e4: 0f e0 0a [ ]*pavgb \(%edx\),%mm1
1e7: 0f e3 d3 [ ]*pavgw %mm3,%mm2
- 1ea: 0f e3 1c 24 [ ]*pavgw \(%esp\),%mm3
+ 1ea: 0f e3 1c 24 [ ]*pavgw \(%esp,%eiz,1\),%mm3
1ee: 0f c5 c1 00 [ ]*pextrw \$0x0,%mm1,%eax
1f2: 0f c4 09 01 [ ]*pinsrw \$0x1,\(%ecx\),%mm1
1f6: 0f c4 d2 02 [ ]*pinsrw \$0x2,%edx,%mm2
1fa: 0f ee c1 [ ]*pmaxsw %mm1,%mm0
1fd: 0f ee 0a [ ]*pmaxsw \(%edx\),%mm1
200: 0f de d2 [ ]*pmaxub %mm2,%mm2
- 203: 0f de 1c 24 [ ]*pmaxub \(%esp\),%mm3
+ 203: 0f de 1c 24 [ ]*pmaxub \(%esp,%eiz,1\),%mm3
207: 0f ea e5 [ ]*pminsw %mm5,%mm4
20a: 0f ea 2e [ ]*pminsw \(%esi\),%mm5
20d: 0f da f7 [ ]*pminub %mm7,%mm6
--- binutils/gas/testsuite/gas/i386/nops-1-i386-i686.d.fake 2007-07-23 13:03:23.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/nops-1-i386-i686.d 2007-09-19 14:50:13.000000000 -0700
@@ -27,15 +27,15 @@ Disassembly of section .text:
0+10 <nop14>:
[ ]*10:[ ]+90[ ]+nop[ ]*
[ ]*11:[ ]+90[ ]+nop[ ]*
-[ ]*12:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*19:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*12:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
+[ ]*19:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+20 <nop13>:
[ ]*20:[ ]+90[ ]+nop[ ]*
[ ]*21:[ ]+90[ ]+nop[ ]*
[ ]*22:[ ]+90[ ]+nop[ ]*
[ ]*23:[ ]+8d b6 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*29:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*29:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+30 <nop12>:
[ ]*30:[ ]+90[ ]+nop[ ]*
@@ -51,8 +51,8 @@ Disassembly of section .text:
[ ]*42:[ ]+90[ ]+nop[ ]*
[ ]*43:[ ]+90[ ]+nop[ ]*
[ ]*44:[ ]+90[ ]+nop[ ]*
-[ ]*45:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*49:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*45:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
+[ ]*49:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+50 <nop10>:
[ ]*50:[ ]+90[ ]+nop[ ]*
@@ -62,7 +62,7 @@ Disassembly of section .text:
[ ]*54:[ ]+90[ ]+nop[ ]*
[ ]*55:[ ]+90[ ]+nop[ ]*
[ ]*56:[ ]+8d 76 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*59:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*59:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+60 <nop9>:
[ ]*60:[ ]+90[ ]+nop[ ]*
@@ -73,7 +73,7 @@ Disassembly of section .text:
[ ]*65:[ ]+90[ ]+nop[ ]*
[ ]*66:[ ]+90[ ]+nop[ ]*
[ ]*67:[ ]+89 f6[ ]+mov[ ]+%esi,%esi
-[ ]*69:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*69:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+70 <nop8>:
[ ]*70:[ ]+90[ ]+nop[ ]*
@@ -85,7 +85,7 @@ Disassembly of section .text:
[ ]*76:[ ]+90[ ]+nop[ ]*
[ ]*77:[ ]+90[ ]+nop[ ]*
[ ]*78:[ ]+90[ ]+nop[ ]*
-[ ]*79:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*79:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+80 <nop7>:
[ ]*80:[ ]+90[ ]+nop[ ]*
@@ -97,7 +97,7 @@ Disassembly of section .text:
[ ]*86:[ ]+90[ ]+nop[ ]*
[ ]*87:[ ]+90[ ]+nop[ ]*
[ ]*88:[ ]+90[ ]+nop[ ]*
-[ ]*89:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*89:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+90 <nop6>:
[ ]*90:[ ]+90[ ]+nop[ ]*
@@ -125,7 +125,7 @@ Disassembly of section .text:
[ ]*a9:[ ]+90[ ]+nop[ ]*
[ ]*aa:[ ]+90[ ]+nop[ ]*
[ ]*ab:[ ]+90[ ]+nop[ ]*
-[ ]*ac:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*ac:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+b0 <nop4>:
[ ]*b0:[ ]+90[ ]+nop[ ]*
@@ -140,7 +140,7 @@ Disassembly of section .text:
[ ]*b9:[ ]+90[ ]+nop[ ]*
[ ]*ba:[ ]+90[ ]+nop[ ]*
[ ]*bb:[ ]+90[ ]+nop[ ]*
-[ ]*bc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*bc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+c0 <nop3>:
[ ]*c0:[ ]+90[ ]+nop[ ]*
--- binutils/gas/testsuite/gas/i386/nops-1-i386.d.fake 2007-07-24 15:03:59.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/nops-1-i386.d 2007-09-19 14:50:13.000000000 -0700
@@ -27,15 +27,15 @@ Disassembly of section .text:
0+10 <nop14>:
[ ]*10:[ ]+90[ ]+nop[ ]*
[ ]*11:[ ]+90[ ]+nop[ ]*
-[ ]*12:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*19:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*12:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
+[ ]*19:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+20 <nop13>:
[ ]*20:[ ]+90[ ]+nop[ ]*
[ ]*21:[ ]+90[ ]+nop[ ]*
[ ]*22:[ ]+90[ ]+nop[ ]*
[ ]*23:[ ]+8d b6 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*29:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*29:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+30 <nop12>:
[ ]*30:[ ]+90[ ]+nop[ ]*
@@ -51,8 +51,8 @@ Disassembly of section .text:
[ ]*42:[ ]+90[ ]+nop[ ]*
[ ]*43:[ ]+90[ ]+nop[ ]*
[ ]*44:[ ]+90[ ]+nop[ ]*
-[ ]*45:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*49:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*45:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
+[ ]*49:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+50 <nop10>:
[ ]*50:[ ]+90[ ]+nop[ ]*
@@ -62,7 +62,7 @@ Disassembly of section .text:
[ ]*54:[ ]+90[ ]+nop[ ]*
[ ]*55:[ ]+90[ ]+nop[ ]*
[ ]*56:[ ]+8d 76 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*59:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*59:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+60 <nop9>:
[ ]*60:[ ]+90[ ]+nop[ ]*
@@ -73,7 +73,7 @@ Disassembly of section .text:
[ ]*65:[ ]+90[ ]+nop[ ]*
[ ]*66:[ ]+90[ ]+nop[ ]*
[ ]*67:[ ]+89 f6[ ]+mov[ ]+%esi,%esi
-[ ]*69:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*69:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+70 <nop8>:
[ ]*70:[ ]+90[ ]+nop[ ]*
@@ -85,7 +85,7 @@ Disassembly of section .text:
[ ]*76:[ ]+90[ ]+nop[ ]*
[ ]*77:[ ]+90[ ]+nop[ ]*
[ ]*78:[ ]+90[ ]+nop[ ]*
-[ ]*79:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*79:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+80 <nop7>:
[ ]*80:[ ]+90[ ]+nop[ ]*
@@ -97,7 +97,7 @@ Disassembly of section .text:
[ ]*86:[ ]+90[ ]+nop[ ]*
[ ]*87:[ ]+90[ ]+nop[ ]*
[ ]*88:[ ]+90[ ]+nop[ ]*
-[ ]*89:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*89:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+90 <nop6>:
[ ]*90:[ ]+90[ ]+nop[ ]*
@@ -125,7 +125,7 @@ Disassembly of section .text:
[ ]*a9:[ ]+90[ ]+nop[ ]*
[ ]*aa:[ ]+90[ ]+nop[ ]*
[ ]*ab:[ ]+90[ ]+nop[ ]*
-[ ]*ac:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*ac:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+b0 <nop4>:
[ ]*b0:[ ]+90[ ]+nop[ ]*
@@ -140,7 +140,7 @@ Disassembly of section .text:
[ ]*b9:[ ]+90[ ]+nop[ ]*
[ ]*ba:[ ]+90[ ]+nop[ ]*
[ ]*bb:[ ]+90[ ]+nop[ ]*
-[ ]*bc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*bc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+c0 <nop3>:
[ ]*c0:[ ]+90[ ]+nop[ ]*
--- binutils/gas/testsuite/gas/i386/nops-1.d.fake 2006-06-23 14:47:36.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/nops-1.d 2007-09-19 14:50:13.000000000 -0700
@@ -26,15 +26,15 @@ Disassembly of section .text:
0+10 <nop14>:
[ ]*10:[ ]+90[ ]+nop[ ]*
[ ]*11:[ ]+90[ ]+nop[ ]*
-[ ]*12:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*19:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*12:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
+[ ]*19:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+20 <nop13>:
[ ]*20:[ ]+90[ ]+nop[ ]*
[ ]*21:[ ]+90[ ]+nop[ ]*
[ ]*22:[ ]+90[ ]+nop[ ]*
[ ]*23:[ ]+8d b6 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*29:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*29:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+30 <nop12>:
[ ]*30:[ ]+90[ ]+nop[ ]*
@@ -50,8 +50,8 @@ Disassembly of section .text:
[ ]*42:[ ]+90[ ]+nop[ ]*
[ ]*43:[ ]+90[ ]+nop[ ]*
[ ]*44:[ ]+90[ ]+nop[ ]*
-[ ]*45:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*49:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*45:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
+[ ]*49:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+50 <nop10>:
[ ]*50:[ ]+90[ ]+nop[ ]*
@@ -61,7 +61,7 @@ Disassembly of section .text:
[ ]*54:[ ]+90[ ]+nop[ ]*
[ ]*55:[ ]+90[ ]+nop[ ]*
[ ]*56:[ ]+8d 76 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*59:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*59:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+60 <nop9>:
[ ]*60:[ ]+90[ ]+nop[ ]*
@@ -72,7 +72,7 @@ Disassembly of section .text:
[ ]*65:[ ]+90[ ]+nop[ ]*
[ ]*66:[ ]+90[ ]+nop[ ]*
[ ]*67:[ ]+89 f6[ ]+mov[ ]+%esi,%esi
-[ ]*69:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*69:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+70 <nop8>:
[ ]*70:[ ]+90[ ]+nop[ ]*
@@ -84,7 +84,7 @@ Disassembly of section .text:
[ ]*76:[ ]+90[ ]+nop[ ]*
[ ]*77:[ ]+90[ ]+nop[ ]*
[ ]*78:[ ]+90[ ]+nop[ ]*
-[ ]*79:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*79:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+80 <nop7>:
[ ]*80:[ ]+90[ ]+nop[ ]*
@@ -96,7 +96,7 @@ Disassembly of section .text:
[ ]*86:[ ]+90[ ]+nop[ ]*
[ ]*87:[ ]+90[ ]+nop[ ]*
[ ]*88:[ ]+90[ ]+nop[ ]*
-[ ]*89:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*89:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+90 <nop6>:
[ ]*90:[ ]+90[ ]+nop[ ]*
@@ -124,7 +124,7 @@ Disassembly of section .text:
[ ]*a9:[ ]+90[ ]+nop[ ]*
[ ]*aa:[ ]+90[ ]+nop[ ]*
[ ]*ab:[ ]+90[ ]+nop[ ]*
-[ ]*ac:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*ac:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+b0 <nop4>:
[ ]*b0:[ ]+90[ ]+nop[ ]*
@@ -139,7 +139,7 @@ Disassembly of section .text:
[ ]*b9:[ ]+90[ ]+nop[ ]*
[ ]*ba:[ ]+90[ ]+nop[ ]*
[ ]*bb:[ ]+90[ ]+nop[ ]*
-[ ]*bc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*bc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+c0 <nop3>:
[ ]*c0:[ ]+90[ ]+nop[ ]*
--- binutils/gas/testsuite/gas/i386/nops-2-i386.d.fake 2007-07-24 15:03:59.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/nops-2-i386.d 2007-09-19 14:50:13.000000000 -0700
@@ -10,7 +10,7 @@ Disassembly of section .text:
0+ <nop>:
[ ]*0:[ ]+0f 44 c0[ ]+cmove[ ]+%eax,%eax
[ ]*3:[ ]+8d b6 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*9:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*9:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+10 <nop15>:
[ ]*10:[ ]+90[ ]+nop[ ]*
@@ -32,15 +32,15 @@ Disassembly of section .text:
0+20 <nop14>:
[ ]*20:[ ]+90[ ]+nop[ ]*
[ ]*21:[ ]+90[ ]+nop[ ]*
-[ ]*22:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*29:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*22:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
+[ ]*29:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+30 <nop13>:
[ ]*30:[ ]+90[ ]+nop[ ]*
[ ]*31:[ ]+90[ ]+nop[ ]*
[ ]*32:[ ]+90[ ]+nop[ ]*
[ ]*33:[ ]+8d b6 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*39:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*39:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+40 <nop12>:
[ ]*40:[ ]+90[ ]+nop[ ]*
@@ -56,8 +56,8 @@ Disassembly of section .text:
[ ]*52:[ ]+90[ ]+nop[ ]*
[ ]*53:[ ]+90[ ]+nop[ ]*
[ ]*54:[ ]+90[ ]+nop[ ]*
-[ ]*55:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*59:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*55:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
+[ ]*59:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+60 <nop10>:
[ ]*60:[ ]+90[ ]+nop[ ]*
@@ -67,7 +67,7 @@ Disassembly of section .text:
[ ]*64:[ ]+90[ ]+nop[ ]*
[ ]*65:[ ]+90[ ]+nop[ ]*
[ ]*66:[ ]+8d 76 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*69:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*69:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+70 <nop9>:
[ ]*70:[ ]+90[ ]+nop[ ]*
@@ -78,7 +78,7 @@ Disassembly of section .text:
[ ]*75:[ ]+90[ ]+nop[ ]*
[ ]*76:[ ]+90[ ]+nop[ ]*
[ ]*77:[ ]+89 f6[ ]+mov[ ]+%esi,%esi
-[ ]*79:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*79:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+80 <nop8>:
[ ]*80:[ ]+90[ ]+nop[ ]*
@@ -90,7 +90,7 @@ Disassembly of section .text:
[ ]*86:[ ]+90[ ]+nop[ ]*
[ ]*87:[ ]+90[ ]+nop[ ]*
[ ]*88:[ ]+90[ ]+nop[ ]*
-[ ]*89:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*89:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+90 <nop7>:
[ ]*90:[ ]+90[ ]+nop[ ]*
@@ -102,7 +102,7 @@ Disassembly of section .text:
[ ]*96:[ ]+90[ ]+nop[ ]*
[ ]*97:[ ]+90[ ]+nop[ ]*
[ ]*98:[ ]+90[ ]+nop[ ]*
-[ ]*99:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*99:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+a0 <nop6>:
[ ]*a0:[ ]+90[ ]+nop[ ]*
@@ -130,7 +130,7 @@ Disassembly of section .text:
[ ]*b9:[ ]+90[ ]+nop[ ]*
[ ]*ba:[ ]+90[ ]+nop[ ]*
[ ]*bb:[ ]+90[ ]+nop[ ]*
-[ ]*bc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*bc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+c0 <nop4>:
[ ]*c0:[ ]+90[ ]+nop[ ]*
@@ -145,7 +145,7 @@ Disassembly of section .text:
[ ]*c9:[ ]+90[ ]+nop[ ]*
[ ]*ca:[ ]+90[ ]+nop[ ]*
[ ]*cb:[ ]+90[ ]+nop[ ]*
-[ ]*cc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*cc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+d0 <nop3>:
[ ]*d0:[ ]+90[ ]+nop[ ]*
--- binutils/gas/testsuite/gas/i386/nops-2-merom.d.fake 2006-08-01 10:54:28.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/nops-2-merom.d 2007-09-19 14:50:13.000000000 -0700
@@ -10,7 +10,7 @@ Disassembly of section .text:
0+ <nop>:
[ ]*0:[ ]+0f 44 c0[ ]+cmove[ ]+%eax,%eax
[ ]*3:[ ]+8d b6 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*9:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*9:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+10 <nop15>:
[ ]*10:[ ]+90[ ]+nop[ ]*
@@ -32,15 +32,15 @@ Disassembly of section .text:
0+20 <nop14>:
[ ]*20:[ ]+90[ ]+nop[ ]*
[ ]*21:[ ]+90[ ]+nop[ ]*
-[ ]*22:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*29:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*22:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
+[ ]*29:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+30 <nop13>:
[ ]*30:[ ]+90[ ]+nop[ ]*
[ ]*31:[ ]+90[ ]+nop[ ]*
[ ]*32:[ ]+90[ ]+nop[ ]*
[ ]*33:[ ]+8d b6 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*39:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*39:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+40 <nop12>:
[ ]*40:[ ]+90[ ]+nop[ ]*
@@ -56,8 +56,8 @@ Disassembly of section .text:
[ ]*52:[ ]+90[ ]+nop[ ]*
[ ]*53:[ ]+90[ ]+nop[ ]*
[ ]*54:[ ]+90[ ]+nop[ ]*
-[ ]*55:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*59:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*55:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
+[ ]*59:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+60 <nop10>:
[ ]*60:[ ]+90[ ]+nop[ ]*
@@ -67,7 +67,7 @@ Disassembly of section .text:
[ ]*64:[ ]+90[ ]+nop[ ]*
[ ]*65:[ ]+90[ ]+nop[ ]*
[ ]*66:[ ]+8d 76 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*69:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*69:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+70 <nop9>:
[ ]*70:[ ]+90[ ]+nop[ ]*
@@ -78,7 +78,7 @@ Disassembly of section .text:
[ ]*75:[ ]+90[ ]+nop[ ]*
[ ]*76:[ ]+90[ ]+nop[ ]*
[ ]*77:[ ]+89 f6[ ]+mov[ ]+%esi,%esi
-[ ]*79:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*79:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+80 <nop8>:
[ ]*80:[ ]+90[ ]+nop[ ]*
@@ -90,7 +90,7 @@ Disassembly of section .text:
[ ]*86:[ ]+90[ ]+nop[ ]*
[ ]*87:[ ]+90[ ]+nop[ ]*
[ ]*88:[ ]+90[ ]+nop[ ]*
-[ ]*89:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*89:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+90 <nop7>:
[ ]*90:[ ]+90[ ]+nop[ ]*
@@ -102,7 +102,7 @@ Disassembly of section .text:
[ ]*96:[ ]+90[ ]+nop[ ]*
[ ]*97:[ ]+90[ ]+nop[ ]*
[ ]*98:[ ]+90[ ]+nop[ ]*
-[ ]*99:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*99:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+a0 <nop6>:
[ ]*a0:[ ]+90[ ]+nop[ ]*
@@ -130,7 +130,7 @@ Disassembly of section .text:
[ ]*b9:[ ]+90[ ]+nop[ ]*
[ ]*ba:[ ]+90[ ]+nop[ ]*
[ ]*bb:[ ]+90[ ]+nop[ ]*
-[ ]*bc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*bc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+c0 <nop4>:
[ ]*c0:[ ]+90[ ]+nop[ ]*
@@ -145,7 +145,7 @@ Disassembly of section .text:
[ ]*c9:[ ]+90[ ]+nop[ ]*
[ ]*ca:[ ]+90[ ]+nop[ ]*
[ ]*cb:[ ]+90[ ]+nop[ ]*
-[ ]*cc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*cc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+d0 <nop3>:
[ ]*d0:[ ]+90[ ]+nop[ ]*
--- binutils/gas/testsuite/gas/i386/nops-2.d.fake 2006-08-01 10:54:28.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/nops-2.d 2007-09-19 14:50:13.000000000 -0700
@@ -9,7 +9,7 @@ Disassembly of section .text:
0+ <nop>:
[ ]*0:[ ]+0f 44 c0[ ]+cmove[ ]+%eax,%eax
[ ]*3:[ ]+8d b6 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*9:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*9:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+10 <nop15>:
[ ]*10:[ ]+90[ ]+nop[ ]*
@@ -31,15 +31,15 @@ Disassembly of section .text:
0+20 <nop14>:
[ ]*20:[ ]+90[ ]+nop[ ]*
[ ]*21:[ ]+90[ ]+nop[ ]*
-[ ]*22:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*29:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*22:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
+[ ]*29:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+30 <nop13>:
[ ]*30:[ ]+90[ ]+nop[ ]*
[ ]*31:[ ]+90[ ]+nop[ ]*
[ ]*32:[ ]+90[ ]+nop[ ]*
[ ]*33:[ ]+8d b6 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*39:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*39:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+40 <nop12>:
[ ]*40:[ ]+90[ ]+nop[ ]*
@@ -55,8 +55,8 @@ Disassembly of section .text:
[ ]*52:[ ]+90[ ]+nop[ ]*
[ ]*53:[ ]+90[ ]+nop[ ]*
[ ]*54:[ ]+90[ ]+nop[ ]*
-[ ]*55:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*59:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*55:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
+[ ]*59:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+60 <nop10>:
[ ]*60:[ ]+90[ ]+nop[ ]*
@@ -66,7 +66,7 @@ Disassembly of section .text:
[ ]*64:[ ]+90[ ]+nop[ ]*
[ ]*65:[ ]+90[ ]+nop[ ]*
[ ]*66:[ ]+8d 76 00[ ]+lea[ ]+0x0\(%esi\),%esi
-[ ]*69:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*69:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+70 <nop9>:
[ ]*70:[ ]+90[ ]+nop[ ]*
@@ -77,7 +77,7 @@ Disassembly of section .text:
[ ]*75:[ ]+90[ ]+nop[ ]*
[ ]*76:[ ]+90[ ]+nop[ ]*
[ ]*77:[ ]+89 f6[ ]+mov[ ]+%esi,%esi
-[ ]*79:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi\),%edi
+[ ]*79:[ ]+8d bc 27 00 00 00 00[ ]+lea[ ]+0x0\(%edi,%eiz,1\),%edi
0+80 <nop8>:
[ ]*80:[ ]+90[ ]+nop[ ]*
@@ -89,7 +89,7 @@ Disassembly of section .text:
[ ]*86:[ ]+90[ ]+nop[ ]*
[ ]*87:[ ]+90[ ]+nop[ ]*
[ ]*88:[ ]+90[ ]+nop[ ]*
-[ ]*89:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*89:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+90 <nop7>:
[ ]*90:[ ]+90[ ]+nop[ ]*
@@ -101,7 +101,7 @@ Disassembly of section .text:
[ ]*96:[ ]+90[ ]+nop[ ]*
[ ]*97:[ ]+90[ ]+nop[ ]*
[ ]*98:[ ]+90[ ]+nop[ ]*
-[ ]*99:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*99:[ ]+8d b4 26 00 00 00 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+a0 <nop6>:
[ ]*a0:[ ]+90[ ]+nop[ ]*
@@ -129,7 +129,7 @@ Disassembly of section .text:
[ ]*b9:[ ]+90[ ]+nop[ ]*
[ ]*ba:[ ]+90[ ]+nop[ ]*
[ ]*bb:[ ]+90[ ]+nop[ ]*
-[ ]*bc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*bc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+c0 <nop4>:
[ ]*c0:[ ]+90[ ]+nop[ ]*
@@ -144,7 +144,7 @@ Disassembly of section .text:
[ ]*c9:[ ]+90[ ]+nop[ ]*
[ ]*ca:[ ]+90[ ]+nop[ ]*
[ ]*cb:[ ]+90[ ]+nop[ ]*
-[ ]*cc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi\),%esi
+[ ]*cc:[ ]+8d 74 26 00[ ]+lea[ ]+0x0\(%esi,%eiz,1\),%esi
0+d0 <nop3>:
[ ]*d0:[ ]+90[ ]+nop[ ]*
--- binutils/gas/testsuite/gas/i386/nops-3-i386.d.fake 2007-07-23 13:03:23.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/nops-3-i386.d 2007-09-19 14:50:13.000000000 -0700
@@ -40,6 +40,6 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 89 c3 mov %eax,%ebx
-[ ]*[a-f0-9]+: 8d b4 26 00 00 00 00 lea 0x0\(%esi\),%esi
-[ ]*[a-f0-9]+: 8d bc 27 00 00 00 00 lea 0x0\(%edi\),%edi
+[ ]*[a-f0-9]+: 8d b4 26 00 00 00 00 lea 0x0\(%esi,%eiz,1\),%esi
+[ ]*[a-f0-9]+: 8d bc 27 00 00 00 00 lea 0x0\(%edi,%eiz,1\),%edi
#pass
--- binutils/gas/testsuite/gas/i386/nops-3.d.fake 2007-07-24 15:03:59.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/nops-3.d 2007-09-19 14:50:13.000000000 -0700
@@ -39,6 +39,6 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 89 c3 mov %eax,%ebx
-[ ]*[a-f0-9]+: 8d b4 26 00 00 00 00 lea 0x0\(%esi\),%esi
-[ ]*[a-f0-9]+: 8d bc 27 00 00 00 00 lea 0x0\(%edi\),%edi
+[ ]*[a-f0-9]+: 8d b4 26 00 00 00 00 lea 0x0\(%esi,%eiz,1\),%esi
+[ ]*[a-f0-9]+: 8d bc 27 00 00 00 00 lea 0x0\(%edi,%eiz,1\),%edi
#pass
--- binutils/gas/testsuite/gas/i386/prescott.d.fake 2007-04-26 21:22:14.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/prescott.d 2007-09-19 14:54:54.000000000 -0700
@@ -20,7 +20,7 @@ Disassembly of section .text:
33: 66 0f 7d c1 [ ]*hsubpd %xmm1,%xmm0
37: 66 0f 7d 0a [ ]*hsubpd \(%edx\),%xmm1
3b: f2 0f 7d d2 [ ]*hsubps %xmm2,%xmm2
- 3f: f2 0f 7d 1c 24 [ ]*hsubps \(%esp\),%xmm3
+ 3f: f2 0f 7d 1c 24 [ ]*hsubps \(%esp,%eiz,1\),%xmm3
44: f2 0f f0 2e [ ]*lddqu \(%esi\),%xmm5
48: 0f 01 c8 [ ]*monitor %eax,%ecx,%edx
4b: 0f 01 c8 [ ]*monitor %eax,%ecx,%edx
--- binutils/gas/testsuite/gas/i386/sib.d.fake 2005-01-12 11:12:51.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/sib.d 2007-09-19 14:55:17.000000000 -0700
@@ -6,10 +6,14 @@
Disassembly of section .text:
0+000 <foo>:
- 0: 8b 04 23 [ ]*mov [ ]*\(%ebx\),%eax
- 3: 8b 04 63 [ ]*mov [ ]*\(%ebx\),%eax
- 6: 8b 04 a3 [ ]*mov [ ]*\(%ebx\),%eax
- 9: 8b 04 e3 [ ]*mov [ ]*\(%ebx\),%eax
- c: 90 [ ]*nop [ ]*
- d: 90 [ ]*nop [ ]*
- ...
+ 0: 8b 03 [ ]*mov [ ]*\(%ebx\),%eax
+ 2: 8b 04 23 [ ]*mov [ ]*\(%ebx,%eiz,1\),%eax
+ 5: 8b 04 63 [ ]*mov [ ]*\(%ebx,%eiz,2\),%eax
+ 8: 8b 04 a3 [ ]*mov [ ]*\(%ebx,%eiz,4\),%eax
+ b: 8b 04 e3 [ ]*mov [ ]*\(%ebx,%eiz,8\),%eax
+ e: 8b 04 24 [ ]*mov [ ]*\(%esp,%eiz,1\),%eax
+ 11: 8b 04 24 [ ]*mov [ ]*\(%esp,%eiz,1\),%eax
+ 14: 8b 04 64 [ ]*mov [ ]*\(%esp,%eiz,2\),%eax
+ 17: 8b 04 a4 [ ]*mov [ ]*\(%esp,%eiz,4\),%eax
+ 1a: 8b 04 e4 [ ]*mov [ ]*\(%esp,%eiz,8\),%eax
+#pass
--- binutils/gas/testsuite/gas/i386/sib.s.fake 2005-01-12 11:12:51.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/sib.s 2007-09-19 15:05:59.000000000 -0700
@@ -1,11 +1,16 @@
#Test the special case of the index bits, 0x4, in SIB.
.text
+ .allow_index_reg
foo:
- .byte 0x8B, 0x04, 0x23 # effect is: movl (%ebx), %eax
- .byte 0x8B, 0x04, 0x63 # effect is: movl (%ebx), %eax
- .byte 0x8B, 0x04, 0xA3 # effect is: movl (%ebx), %eax
- .byte 0x8B, 0x04, 0xE3 # effect is: movl (%ebx), %eax
- nop
- nop
- .p2align 4,0
+ mov (%ebx),%eax
+ mov (%ebx,%eiz,1),%eax
+ mov (%ebx,%eiz,2),%eax
+ mov (%ebx,%eiz,4),%eax
+ mov (%ebx,%eiz,8),%eax
+ mov (%esp),%eax
+ mov (%esp,%eiz,1),%eax
+ mov (%esp,%eiz,2),%eax
+ mov (%esp,%eiz,4),%eax
+ mov (%esp,%eiz,8),%eax
+ .p2align 4
--- binutils/gas/testsuite/gas/i386/sse2.d.fake 2006-11-09 15:29:20.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/sse2.d 2007-09-19 14:54:34.000000000 -0700
@@ -22,7 +22,7 @@ Disassembly of section .text:
[ ]+2d: 66 0f c2 c1 02[ ]+cmplepd %xmm1,%xmm0
[ ]+32: 66 0f c2 0a 03[ ]+cmpunordpd \(%edx\),%xmm1
[ ]+37: f2 0f c2 d2 04[ ]+cmpneqsd %xmm2,%xmm2
-[ ]+3c: f2 0f c2 1c 24 05[ ]+cmpnltsd \(%esp\),%xmm3
+[ ]+3c: f2 0f c2 1c 24 05[ ]+cmpnltsd \(%esp,%eiz,1\),%xmm3
[ ]+42: 66 0f c2 e5 06[ ]+cmpnlepd %xmm5,%xmm4
[ ]+47: 66 0f c2 2e 07[ ]+cmpordpd \(%esi\),%xmm5
[ ]+4c: f2 0f c2 f7 00[ ]+cmpeqsd %xmm7,%xmm6
@@ -30,7 +30,7 @@ Disassembly of section .text:
[ ]+56: 66 0f c2 c1 00[ ]+cmpeqpd %xmm1,%xmm0
[ ]+5b: 66 0f c2 0a 00[ ]+cmpeqpd \(%edx\),%xmm1
[ ]+60: f2 0f c2 d2 00[ ]+cmpeqsd %xmm2,%xmm2
-[ ]+65: f2 0f c2 1c 24 00[ ]+cmpeqsd \(%esp\),%xmm3
+[ ]+65: f2 0f c2 1c 24 00[ ]+cmpeqsd \(%esp,%eiz,1\),%xmm3
[ ]+6b: 66 0f c2 e5 01[ ]+cmpltpd %xmm5,%xmm4
[ ]+70: 66 0f c2 2e 01[ ]+cmpltpd \(%esi\),%xmm5
[ ]+75: f2 0f c2 f7 01[ ]+cmpltsd %xmm7,%xmm6
@@ -46,7 +46,7 @@ Disassembly of section .text:
[ ]+a8: 66 0f c2 c1 04[ ]+cmpneqpd %xmm1,%xmm0
[ ]+ad: 66 0f c2 0a 04[ ]+cmpneqpd \(%edx\),%xmm1
[ ]+b2: f2 0f c2 d2 04[ ]+cmpneqsd %xmm2,%xmm2
-[ ]+b7: f2 0f c2 1c 24 04[ ]+cmpneqsd \(%esp\),%xmm3
+[ ]+b7: f2 0f c2 1c 24 04[ ]+cmpneqsd \(%esp,%eiz,1\),%xmm3
[ ]+bd: 66 0f c2 e5 05[ ]+cmpnltpd %xmm5,%xmm4
[ ]+c2: 66 0f c2 2e 05[ ]+cmpnltpd \(%esi\),%xmm5
[ ]+c7: f2 0f c2 f7 05[ ]+cmpnltsd %xmm7,%xmm6
@@ -62,7 +62,7 @@ Disassembly of section .text:
[ ]+fa: 66 0f 2f c1[ ]+comisd %xmm1,%xmm0
[ ]+fe: 66 0f 2f 0a[ ]+comisd \(%edx\),%xmm1
102: 66 0f 2a d3[ ]+cvtpi2pd %mm3,%xmm2
- 106: 66 0f 2a 1c 24[ ]+cvtpi2pd \(%esp\),%xmm3
+ 106: 66 0f 2a 1c 24[ ]+cvtpi2pd \(%esp,%eiz,1\),%xmm3
10b: f2 0f 2a e5[ ]+cvtsi2sd %ebp,%xmm4
10f: f2 0f 2a 2e[ ]+cvtsi2sd \(%esi\),%xmm5
113: 66 0f 2d f7[ ]+cvtpd2pi %xmm7,%mm6
@@ -76,14 +76,14 @@ Disassembly of section .text:
134: 66 0f 5e c1[ ]+divpd[ ]+%xmm1,%xmm0
138: 66 0f 5e 0a[ ]+divpd[ ]+\(%edx\),%xmm1
13c: f2 0f 5e d3[ ]+divsd[ ]+%xmm3,%xmm2
- 140: f2 0f 5e 1c 24[ ]+divsd[ ]+\(%esp\),%xmm3
+ 140: f2 0f 5e 1c 24[ ]+divsd[ ]+\(%esp,%eiz,1\),%xmm3
145: 0f ae 55 00[ ]+ldmxcsr 0x0\(%ebp\)
149: 0f ae 1e[ ]+stmxcsr \(%esi\)
14c: 0f ae f8[ ]+sfence
14f: 66 0f 5f c1[ ]+maxpd[ ]+%xmm1,%xmm0
153: 66 0f 5f 0a[ ]+maxpd[ ]+\(%edx\),%xmm1
157: f2 0f 5f d3[ ]+maxsd[ ]+%xmm3,%xmm2
- 15b: f2 0f 5f 1c 24[ ]+maxsd[ ]+\(%esp\),%xmm3
+ 15b: f2 0f 5f 1c 24[ ]+maxsd[ ]+\(%esp,%eiz,1\),%xmm3
160: 66 0f 5d e5[ ]+minpd[ ]+%xmm5,%xmm4
164: 66 0f 5d 2e[ ]+minpd[ ]+\(%esi\),%xmm5
168: f2 0f 5d f7[ ]+minsd[ ]+%xmm7,%xmm6
@@ -91,7 +91,7 @@ Disassembly of section .text:
170: 66 0f 28 c1[ ]+movapd %xmm1,%xmm0
174: 66 0f 29 11[ ]+movapd %xmm2,\(%ecx\)
178: 66 0f 28 12[ ]+movapd \(%edx\),%xmm2
- 17c: 66 0f 17 2c 24[ ]+movhpd %xmm5,\(%esp\)
+ 17c: 66 0f 17 2c 24[ ]+movhpd %xmm5,\(%esp,%eiz,1\)
181: 66 0f 16 2e[ ]+movhpd \(%esi\),%xmm5
185: 66 0f 13 07[ ]+movlpd %xmm0,\(%edi\)
189: 66 0f 12 00[ ]+movlpd \(%eax\),%xmm0
@@ -105,7 +105,7 @@ Disassembly of section .text:
1aa: 66 0f 59 c1[ ]+mulpd[ ]+%xmm1,%xmm0
1ae: 66 0f 59 0a[ ]+mulpd[ ]+\(%edx\),%xmm1
1b2: f2 0f 59 d2[ ]+mulsd[ ]+%xmm2,%xmm2
- 1b6: f2 0f 59 1c 24[ ]+mulsd[ ]+\(%esp\),%xmm3
+ 1b6: f2 0f 59 1c 24[ ]+mulsd[ ]+\(%esp,%eiz,1\),%xmm3
1bb: 66 0f 56 e5[ ]+orpd[ ]+%xmm5,%xmm4
1bf: 66 0f 56 2e[ ]+orpd[ ]+\(%esi\),%xmm5
1c3: 66 0f c6 37 02[ ]+shufpd \$0x2,\(%edi\),%xmm6
@@ -113,7 +113,7 @@ Disassembly of section .text:
1cd: 66 0f 51 c1[ ]+sqrtpd %xmm1,%xmm0
1d1: 66 0f 51 0a[ ]+sqrtpd \(%edx\),%xmm1
1d5: f2 0f 51 d2[ ]+sqrtsd %xmm2,%xmm2
- 1d9: f2 0f 51 1c 24[ ]+sqrtsd \(%esp\),%xmm3
+ 1d9: f2 0f 51 1c 24[ ]+sqrtsd \(%esp,%eiz,1\),%xmm3
1de: 66 0f 5c e5[ ]+subpd[ ]+%xmm5,%xmm4
1e2: 66 0f 5c 2e[ ]+subpd[ ]+\(%esi\),%xmm5
1e6: f2 0f 5c f7[ ]+subsd[ ]+%xmm7,%xmm6
--- binutils/gas/testsuite/gas/i386/ssemmx2.d.fake 2007-07-24 15:03:59.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/ssemmx2.d 2007-09-19 14:53:53.000000000 -0700
@@ -10,14 +10,14 @@ Disassembly of section .text:
[ ]+0: 66 0f e0 c1[ ]+pavgb[ ]+%xmm1,%xmm0
[ ]+4: 66 0f e0 0a[ ]+pavgb[ ]+\(%edx\),%xmm1
[ ]+8: 66 0f e3 d3[ ]+pavgw[ ]+%xmm3,%xmm2
-[ ]+c: 66 0f e3 1c 24[ ]+pavgw[ ]+\(%esp\),%xmm3
+[ ]+c: 66 0f e3 1c 24[ ]+pavgw[ ]+\(%esp,%eiz,1\),%xmm3
[ ]+11: 66 0f c5 c1 00[ ]+pextrw \$0x0,%xmm1,%eax
[ ]+16: 66 0f c4 09 01[ ]+pinsrw \$0x1,\(%ecx\),%xmm1
[ ]+1b: 66 0f c4 d2 02[ ]+pinsrw \$0x2,%edx,%xmm2
[ ]+20: 66 0f ee c1[ ]+pmaxsw %xmm1,%xmm0
[ ]+24: 66 0f ee 0a[ ]+pmaxsw \(%edx\),%xmm1
[ ]+28: 66 0f de d2[ ]+pmaxub %xmm2,%xmm2
-[ ]+2c: 66 0f de 1c 24[ ]+pmaxub \(%esp\),%xmm3
+[ ]+2c: 66 0f de 1c 24[ ]+pmaxub \(%esp,%eiz,1\),%xmm3
[ ]+31: 66 0f ea e5[ ]+pminsw %xmm5,%xmm4
[ ]+35: 66 0f ea 2e[ ]+pminsw \(%esi\),%xmm5
[ ]+39: 66 0f da f7[ ]+pminub %xmm7,%xmm6
--- binutils/gas/testsuite/gas/i386/x86-64-addr32-intel.d.fake 2007-04-26 11:15:47.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86-64-addr32-intel.d 2007-09-19 15:08:18.000000000 -0700
@@ -11,7 +11,7 @@ Disassembly of section .text:
[ ]*0:[ ]+67 48 8d 80 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,\[[re]ax\+(0x)?0\].*
[ ]*8:[ ]+67 49 8d 80 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,\[r8d?\+(0x)?0\].*
[ ]*10:[ ]+67 48 8d 05 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,\[[re]ip\+(0x)?0\].*
-[ ]*18:[ ]+67 48 8d 04 25 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,ds:0x0.*
+[ ]*18:[ ]+67 48 8d 04 25 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,\[eiz\*1\+0x0\].*
[ ]*21:[ ]+67 a0 98 08 60 00[ ]+addr32[ ]+mov[ ]+al,ds:0x600898
[ ]*27:[ ]+67 66 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+ax,ds:0x600898
[ ]*2e:[ ]+67 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+eax,ds:0x600898
--- binutils/gas/testsuite/gas/i386/x86-64-addr32.d.fake 2007-04-26 21:22:14.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86-64-addr32.d 2007-09-19 15:07:10.000000000 -0700
@@ -10,7 +10,7 @@ Disassembly of section .text:
[ ]*0:[ ]+67 48 8d 80 00 00 00 00[ ]+addr32[ ]+lea[ ]+0x0\(%[re]ax\),%rax.*
[ ]*8:[ ]+67 49 8d 80 00 00 00 00[ ]+addr32[ ]+lea[ ]+0x0\(%r8d?\),%rax.*
[ ]*10:[ ]+67 48 8d 05 00 00 00 00[ ]+addr32[ ]+lea[ ]+0x0\(%[re]ip\),%rax.*
-[ ]*18:[ ]+67 48 8d 04 25 00 00 00 00[ ]+addr32[ ]+lea[ ]+0x0,%rax.*
+[ ]*18:[ ]+67 48 8d 04 25 00 00 00 00[ ]+addr32[ ]+lea[ ]+0x0\(,%eiz,1\),%rax.*
[ ]*21:[ ]+67 a0 98 08 60 00[ ]+addr32[ ]+mov[ ]+0x600898,%al
[ ]*27:[ ]+67 66 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+0x600898,%ax
[ ]*2e:[ ]+67 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+0x600898,%eax
--- binutils/gas/testsuite/gas/i386/x86-64-prescott.d.fake 2007-04-26 21:22:14.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86-64-prescott.d 2007-09-19 15:08:56.000000000 -0700
@@ -20,7 +20,7 @@ Disassembly of section .text:
33: 66 0f 7d c1 [ ]*hsubpd %xmm1,%xmm0
37: 66 0f 7d 0a [ ]*hsubpd \(%rdx\),%xmm1
3b: f2 0f 7d d2 [ ]*hsubps %xmm2,%xmm2
- 3f: f2 0f 7d 1c 24 [ ]*hsubps \(%rsp\),%xmm3
+ 3f: f2 0f 7d 1c 24 [ ]*hsubps \(%rsp,%riz,1\),%xmm3
44: f2 0f f0 2e [ ]*lddqu \(%rsi\),%xmm5
48: 0f 01 c8 [ ]*monitor %rax,%rcx,%rdx
4b: 0f 01 c8 [ ]*monitor %rax,%rcx,%rdx
--- binutils/gas/testsuite/gas/i386/x86_64.d.fake 2007-04-26 21:22:14.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86_64.d 2007-09-19 15:35:18.000000000 -0700
@@ -1,6 +1,6 @@
#as: -J
#objdump: -dw
-#name: i386 x86_64
+#name: x86_64
#stderr: x86_64.e
.*: +file format .*
@@ -54,7 +54,7 @@ Disassembly of section .text:
[ ]+9c: 49 03 00[ ]+add[ ]+\(%r8\),%rax
[ ]+9f: 03 05 22 22 22 22[ ]+add[ ]+0x22222222\(%rip\),%eax.*
[ ]+a5: 03 45 00[ ]+add[ ]+0x0\(%rbp\),%eax
-[ ]+a8: 03 04 25 22 22 22 22 add[ ]+0x22222222,%eax
+[ ]+a8: 03 04 25 22 22 22 22 add[ ]+0x22222222\(,%riz,1\),%eax
[ ]+af: 41 03 45 00[ ]+add[ ]+0x0\(%r13\),%eax
[ ]+b3: 03 04 80[ ]+add[ ]+\(%rax,%rax,4\),%eax
[ ]+b6: 41 03 04 80[ ]+add[ ]+\(%r8,%rax,4\),%eax
@@ -92,7 +92,7 @@ Disassembly of section .text:
145: 83 80 22 22 22 22 33 addl[ ]+\$0x33,0x22222222\(%rax\)
14c: 83 80 22 22 22 22 33 addl[ ]+\$0x33,0x22222222\(%rax\)
153: 41 83 04 e8 33[ ]+addl[ ]+\$0x33,\(%r8,%rbp,8\)
- 158: 83 04 25 22 22 22 22 33 addl[ ]+\$0x33,0x22222222
+ 158: 83 04 25 22 22 22 22 33 addl[ ]+\$0x33,0x22222222\(,%riz,1\)
160: a0 11 22 33 44 55 66 77 88 mov[ ]+0x8877665544332211,%al
169: a1 11 22 33 44 55 66 77 88 mov[ ]+0x8877665544332211,%eax
172: a2 11 22 33 44 55 66 77 88 mov[ ]+%al,0x8877665544332211
@@ -111,7 +111,7 @@ Disassembly of section .text:
1ad: b8 00 00 00 00[ ]+mov[ ]+\$0x0,%eax
1b2: 48 c7 c0 00 00 00 00 mov[ ]+\$0x0,%rax
1b9: a1 00 00 00 00 00 00 00 00 mov[ ]+0x0,%eax
- 1c2: 8b 04 25 00 00 00 00 mov[ ]+0x0,%eax
+ 1c2: 8b 04 25 00 00 00 00 mov[ ]+0x0\(,%riz,1\),%eax
1c9: 8b 80 00 00 00 00[ ]+mov[ ]+0x0\(%rax\),%eax
1cf: 8b 05 00 00 00 00[ ]+mov[ ]+0x0\(%rip\),%eax.*
1d5: b0 00[ ]+mov[ ]+\$0x0,%al
@@ -119,7 +119,7 @@ Disassembly of section .text:
1db: b8 00 00 00 00[ ]+mov[ ]+\$0x0,%eax
1e0: 48 c7 c0 00 00 00 00 mov[ ]+\$0x0,%rax
1e7: a1 00 00 00 00 00 00 00 00 mov[ ]+0x0,%eax
- 1f0: 8b 04 25 00 00 00 00 mov[ ]+0x0,%eax
+ 1f0: 8b 04 25 00 00 00 00 mov[ ]+0x0\(,%riz,1\),%eax
1f7: 8b 80 00 00 00 00[ ]+mov[ ]+0x0\(%rax\),%eax
1fd: 8b 05 00 00 00 00[ ]+mov[ ]+0x0\(%rip\),%eax.*
@@ -140,22 +140,22 @@ Disassembly of section .text:
27e: 66 a3 11 22 33 44 55 66 77 88 mov[ ]+%ax,0x8877665544332211
288: a3 11 22 33 44 55 66 77 88 mov[ ]+%eax,0x8877665544332211
291: 48 a3 11 22 33 44 55 66 77 88 mov[ ]+%rax,0x8877665544332211
- 29b: 8a 04 25 11 22 33 ff mov[ ]+0xffffffffff332211,%al
- 2a2: 66 8b 04 25 11 22 33 ff mov[ ]+0xffffffffff332211,%ax
- 2aa: 8b 04 25 11 22 33 ff mov[ ]+0xffffffffff332211,%eax
- 2b1: 48 8b 04 25 11 22 33 ff mov[ ]+0xffffffffff332211,%rax
- 2b9: 88 04 25 11 22 33 ff mov[ ]+%al,0xffffffffff332211
- 2c0: 66 89 04 25 11 22 33 ff mov[ ]+%ax,0xffffffffff332211
- 2c8: 89 04 25 11 22 33 ff mov[ ]+%eax,0xffffffffff332211
- 2cf: 48 89 04 25 11 22 33 ff mov[ ]+%rax,0xffffffffff332211
- 2d7: 8a 04 25 11 22 33 ff mov[ ]+0xffffffffff332211,%al
- 2de: 66 8b 04 25 11 22 33 ff mov[ ]+0xffffffffff332211,%ax
- 2e6: 8b 04 25 11 22 33 ff mov[ ]+0xffffffffff332211,%eax
- 2ed: 48 8b 04 25 11 22 33 ff mov[ ]+0xffffffffff332211,%rax
- 2f5: 88 04 25 11 22 33 ff mov[ ]+%al,0xffffffffff332211
- 2fc: 66 89 04 25 11 22 33 ff mov[ ]+%ax,0xffffffffff332211
- 304: 89 04 25 11 22 33 ff mov[ ]+%eax,0xffffffffff332211
- 30b: 48 89 04 25 11 22 33 ff mov[ ]+%rax,0xffffffffff332211
+ 29b: 8a 04 25 11 22 33 ff mov[ ]+0xffffffffff332211\(,%riz,1\),%al
+ 2a2: 66 8b 04 25 11 22 33 ff mov[ ]+0xffffffffff332211\(,%riz,1\),%ax
+ 2aa: 8b 04 25 11 22 33 ff mov[ ]+0xffffffffff332211\(,%riz,1\),%eax
+ 2b1: 48 8b 04 25 11 22 33 ff mov[ ]+0xffffffffff332211\(,%riz,1\),%rax
+ 2b9: 88 04 25 11 22 33 ff mov[ ]+%al,0xffffffffff332211\(,%riz,1\)
+ 2c0: 66 89 04 25 11 22 33 ff mov[ ]+%ax,0xffffffffff332211\(,%riz,1\)
+ 2c8: 89 04 25 11 22 33 ff mov[ ]+%eax,0xffffffffff332211\(,%riz,1\)
+ 2cf: 48 89 04 25 11 22 33 ff mov[ ]+%rax,0xffffffffff332211\(,%riz,1\)
+ 2d7: 8a 04 25 11 22 33 ff mov[ ]+0xffffffffff332211\(,%riz,1\),%al
+ 2de: 66 8b 04 25 11 22 33 ff mov[ ]+0xffffffffff332211\(,%riz,1\),%ax
+ 2e6: 8b 04 25 11 22 33 ff mov[ ]+0xffffffffff332211\(,%riz,1\),%eax
+ 2ed: 48 8b 04 25 11 22 33 ff mov[ ]+0xffffffffff332211\(,%riz,1\),%rax
+ 2f5: 88 04 25 11 22 33 ff mov[ ]+%al,0xffffffffff332211\(,%riz,1\)
+ 2fc: 66 89 04 25 11 22 33 ff mov[ ]+%ax,0xffffffffff332211\(,%riz,1\)
+ 304: 89 04 25 11 22 33 ff mov[ ]+%eax,0xffffffffff332211\(,%riz,1\)
+ 30b: 48 89 04 25 11 22 33 ff mov[ ]+%rax,0xffffffffff332211\(,%riz,1\)
313: 48 0f c7 08[ ]+cmpxchg16b \(%rax\)
317: 48 0f c7 08[ ]+cmpxchg16b \(%rax\)
#pass
--- binutils/ld/testsuite/ld-i386/tlsbin.dd.fake 2007-08-23 09:13:57.000000000 -0700
+++ binutils/ld/testsuite/ld-i386/tlsbin.dd 2007-09-19 15:37:35.000000000 -0700
@@ -92,7 +92,7 @@ Disassembly of section .text:
# LD -> LE
8049085: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
804908b: 90[ ]+nop *
- 804908c: 8d 74 26 00[ ]+lea 0x0\(%esi\),%esi
+ 804908c: 8d 74 26 00[ ]+lea 0x0\(%esi,%eiz,1\),%esi
8049090: 90[ ]+nop *
8049091: 90[ ]+nop *
8049092: 8d 90 20 f0 ff ff[ ]+lea -0xfe0\(%eax\),%edx
@@ -108,7 +108,7 @@ Disassembly of section .text:
# LD -> LE against hidden variables
80490a4: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax
80490aa: 90[ ]+nop *
- 80490ab: 8d 74 26 00[ ]+lea 0x0\(%esi\),%esi
+ 80490ab: 8d 74 26 00[ ]+lea 0x0\(%esi,%eiz,1\),%esi
80490af: 90[ ]+nop *
80490b0: 90[ ]+nop *
80490b1: 8d 90 40 f0 ff ff[ ]+lea -0xfc0\(%eax\),%edx
--- binutils/ld/testsuite/ld-i386/tlsld1.dd.fake 2007-08-14 12:48:20.000000000 -0700
+++ binutils/ld/testsuite/ld-i386/tlsld1.dd 2007-09-19 15:36:45.000000000 -0700
@@ -11,5 +11,5 @@ Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 65 a1 00 00 00 00 mov %gs:0x0,%eax
[ ]*[a-f0-9]+: 90 nop
-[ ]*[a-f0-9]+: 8d 74 26 00 lea 0x0\(%esi\),%esi
+[ ]*[a-f0-9]+: 8d 74 26 00 lea 0x0\(%esi,%eiz,1\),%esi
#pass
--- binutils/ld/testsuite/ld-x86-64/tlsbin.dd.fake 2007-04-26 21:22:14.000000000 -0700
+++ binutils/ld/testsuite/ld-x86-64/tlsbin.dd 2007-09-19 15:44:21.000000000 -0700
@@ -22,7 +22,7 @@ Disassembly of section .text:
401000: 55[ ]+push %rbp
401001: 48 89 e5[ ]+mov %rsp,%rbp
# GD -> IE because variable is not defined in executable
- 401004: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ 401004: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
40100b: 00 00 *
40100d: 48 03 05 d4 03 20 00[ ]+add 0x2003d4\(%rip\),%rax +# 6013e8 <.*>
# -> R_X86_64_TPOFF64 sG1
@@ -32,7 +32,7 @@ Disassembly of section .text:
401017: 90[ ]+nop *
# GD -> IE because variable is not defined in executable where
# the variable is referenced through IE too
- 401018: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ 401018: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
40101f: 00 00 *
401021: 48 03 05 b0 03 20 00[ ]+add 0x2003b0\(%rip\),%rax +# 6013d8 <.*>
# -> R_X86_64_TPOFF64 sG2
@@ -41,7 +41,7 @@ Disassembly of section .text:
40102a: 90[ ]+nop *
40102b: 90[ ]+nop *
# GD -> LE with global variable defined in executable
- 40102c: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ 40102c: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
401033: 00 00 *
401035: 48 8d 80 60 ff ff ff[ ]+lea -0xa0\(%rax\),%rax
# sg1
@@ -50,7 +50,7 @@ Disassembly of section .text:
40103e: 90[ ]+nop *
40103f: 90[ ]+nop *
# GD -> LE with local variable defined in executable
- 401040: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ 401040: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
401047: 00 00 *
401049: 48 8d 80 80 ff ff ff[ ]+lea -0x80\(%rax\),%rax
# sl1
@@ -59,7 +59,7 @@ Disassembly of section .text:
401052: 90[ ]+nop *
401053: 90[ ]+nop *
# GD -> LE with hidden variable defined in executable
- 401054: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ 401054: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
40105b: 00 00 *
40105d: 48 8d 80 a0 ff ff ff[ ]+lea -0x60\(%rax\),%rax
# sh1
@@ -68,7 +68,7 @@ Disassembly of section .text:
401066: 90[ ]+nop *
401067: 90[ ]+nop *
# LD -> LE
- 401068: 66 66 66 64 48 8b 04[ ]+mov %fs:0x0,%rax
+ 401068: 66 66 66 64 48 8b 04[ ]+mov %fs:0x0\(,%riz,1\),%rax
40106f: 25 00 00 00 00 *
401074: 90[ ]+nop *
401075: 90[ ]+nop *
@@ -83,7 +83,7 @@ Disassembly of section .text:
401088: 90[ ]+nop *
401089: 90[ ]+nop *
# LD -> LE against hidden variables
- 40108a: 66 66 66 64 48 8b 04[ ]+mov %fs:0x0,%rax
+ 40108a: 66 66 66 64 48 8b 04[ ]+mov %fs:0x0\(,%riz,1\),%rax
401091: 25 00 00 00 00 *
401096: 90[ ]+nop *
401097: 90[ ]+nop *
@@ -98,7 +98,7 @@ Disassembly of section .text:
4010aa: 90[ ]+nop *
4010ab: 90[ ]+nop *
# IE against global var
- 4010ac: 64 4c 8b 0c 25 00 00[ ]+mov %fs:0x0,%r9
+ 4010ac: 64 4c 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%r9
4010b3: 00 00 *
4010b5: 90[ ]+nop *
4010b6: 90[ ]+nop *
@@ -109,7 +109,7 @@ Disassembly of section .text:
4010c0: 90[ ]+nop *
4010c1: 90[ ]+nop *
# IE -> LE against global var defined in exec
- 4010c2: 64 4c 8b 14 25 00 00[ ]+mov %fs:0x0,%r10
+ 4010c2: 64 4c 8b 14 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%r10
4010c9: 00 00 *
4010cb: 90[ ]+nop *
4010cc: 90[ ]+nop *
@@ -120,7 +120,7 @@ Disassembly of section .text:
4010d6: 90[ ]+nop *
4010d7: 90[ ]+nop *
# IE -> LE against local var
- 4010d8: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ 4010d8: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
4010df: 00 00 *
4010e1: 90[ ]+nop *
4010e2: 90[ ]+nop *
@@ -131,7 +131,7 @@ Disassembly of section .text:
4010ec: 90[ ]+nop *
4010ed: 90[ ]+nop *
# IE -> LE against hidden var
- 4010ee: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ 4010ee: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rcx
4010f5: 00 00 *
4010f7: 90[ ]+nop *
4010f8: 90[ ]+nop *
@@ -182,7 +182,7 @@ Disassembly of section .text:
40113c: 55[ ]+push %rbp
40113d: 48 89 e5[ ]+mov %rsp,%rbp
# IE against global var
- 401140: 64 4c 8b 1c 25 00 00[ ]+mov %fs:0x0,%r11
+ 401140: 64 4c 8b 1c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%r11
401147: 00 00 *
401149: 90[ ]+nop *
40114a: 90[ ]+nop *
@@ -193,7 +193,7 @@ Disassembly of section .text:
401154: 90[ ]+nop *
401155: 90[ ]+nop *
# IE -> LE against global var defined in exec
- 401156: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0,%rdx
+ 401156: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rdx
40115d: 00 00 *
40115f: 90[ ]+nop *
401160: 90[ ]+nop *
@@ -204,7 +204,7 @@ Disassembly of section .text:
40116a: 90[ ]+nop *
40116b: 90[ ]+nop *
# IE -> LE against local var
- 40116c: 64 4c 8b 24 25 00 00[ ]+mov %fs:0x0,%r12
+ 40116c: 64 4c 8b 24 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%r12
401173: 00 00 *
401175: 90[ ]+nop *
401176: 90[ ]+nop *
@@ -225,7 +225,7 @@ Disassembly of section .text:
401191: 90[ ]+nop *
401192: 90[ ]+nop *
# IE -> LE against hidden but not local var
- 401193: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0,%rdx
+ 401193: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rdx
40119a: 00 00 *
40119c: 90[ ]+nop *
40119d: 90[ ]+nop *
@@ -246,7 +246,7 @@ Disassembly of section .text:
4011b8: 90[ ]+nop *
4011b9: 90[ ]+nop *
# LE, global var defined in exec
- 4011ba: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ 4011ba: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
4011c1: 00 00 *
4011c3: 90[ ]+nop *
4011c4: 90[ ]+nop *
@@ -261,7 +261,7 @@ Disassembly of section .text:
# bl2+2
4011d7: 90[ ]+nop *
4011d8: 90[ ]+nop *
- 4011d9: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0,%rdx
+ 4011d9: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rdx
4011e0: 00 00 *
4011e2: 90[ ]+nop *
4011e3: 90[ ]+nop *
@@ -271,7 +271,7 @@ Disassembly of section .text:
4011e9: 90[ ]+nop *
4011ea: 90[ ]+nop *
# LE, hidden var defined in exec, non-canonical sequence
- 4011eb: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0,%rdx
+ 4011eb: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rdx
4011f2: 00 00 *
4011f4: 90[ ]+nop *
4011f5: 90[ ]+nop *
@@ -283,7 +283,7 @@ Disassembly of section .text:
401200: 90[ ]+nop *
# Direct %fs access
# LE, global var defined in exec
- 401201: 64 48 8b 04 25 68 ff[ ]+mov %fs:0xf+68,%rax
+ 401201: 64 48 8b 04 25 68 ff[ ]+mov %fs:0xf+68\(,%riz,1\),%rax
401208: ff ff *
# sg3
40120a: 90[ ]+nop *
@@ -291,7 +291,7 @@ Disassembly of section .text:
40120c: 90[ ]+nop *
40120d: 90[ ]+nop *
# LE, local var
- 40120e: 64 4c 8b 14 25 eb ff[ ]+mov %fs:0xf+eb,%r10
+ 40120e: 64 4c 8b 14 25 eb ff[ ]+mov %fs:0xf+eb\(,%riz,1\),%r10
401215: ff ff *
# bl3+3
401217: 90[ ]+nop *
@@ -299,7 +299,7 @@ Disassembly of section .text:
401219: 90[ ]+nop *
40121a: 90[ ]+nop *
# LE, hidden var defined in exec
- 40121b: 64 48 8b 14 25 a9 ff[ ]+mov %fs:0xf+a9,%rdx
+ 40121b: 64 48 8b 14 25 a9 ff[ ]+mov %fs:0xf+a9\(,%riz,1\),%rdx
401222: ff ff *
# sh3+1
401224: 90[ ]+nop *
--- binutils/ld/testsuite/ld-x86-64/tlsbindesc.dd.fake 2007-04-26 21:22:14.000000000 -0700
+++ binutils/ld/testsuite/ld-x86-64/tlsbindesc.dd 2007-09-19 15:44:34.000000000 -0700
@@ -89,7 +89,7 @@ Disassembly of section .text:
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
# IE against global var
- [0-9a-f]+: 64 4c 8b 0c 25 00 00[ ]+mov %fs:0x0,%r9
+ [0-9a-f]+: 64 4c 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%r9
[0-9a-f]+: 00 00 *
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
@@ -100,7 +100,7 @@ Disassembly of section .text:
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
# IE -> LE against global var defined in exec
- [0-9a-f]+: 64 4c 8b 14 25 00 00[ ]+mov %fs:0x0,%r10
+ [0-9a-f]+: 64 4c 8b 14 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%r10
[0-9a-f]+: 00 00 *
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
@@ -111,7 +111,7 @@ Disassembly of section .text:
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
# IE -> LE against local var
- [0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ [0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
[0-9a-f]+: 00 00 *
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
@@ -122,7 +122,7 @@ Disassembly of section .text:
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
# IE -> LE against hidden var
- [0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ [0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rcx
[0-9a-f]+: 00 00 *
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
@@ -173,7 +173,7 @@ Disassembly of section .text:
[0-9a-f]+: 55[ ]+push %rbp
[0-9a-f]+: 48 89 e5[ ]+mov %rsp,%rbp
# IE against global var
- [0-9a-f]+: 64 4c 8b 1c 25 00 00[ ]+mov %fs:0x0,%r11
+ [0-9a-f]+: 64 4c 8b 1c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%r11
[0-9a-f]+: 00 00 *
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
@@ -184,7 +184,7 @@ Disassembly of section .text:
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
# IE -> LE against global var defined in exec
- [0-9a-f]+: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0,%rdx
+ [0-9a-f]+: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rdx
[0-9a-f]+: 00 00 *
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
@@ -195,7 +195,7 @@ Disassembly of section .text:
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
# IE -> LE against local var
- [0-9a-f]+: 64 4c 8b 24 25 00 00[ ]+mov %fs:0x0,%r12
+ [0-9a-f]+: 64 4c 8b 24 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%r12
[0-9a-f]+: 00 00 *
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
@@ -216,7 +216,7 @@ Disassembly of section .text:
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
# IE -> LE against hidden but not local var
- [0-9a-f]+: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0,%rdx
+ [0-9a-f]+: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rdx
[0-9a-f]+: 00 00 *
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
@@ -237,7 +237,7 @@ Disassembly of section .text:
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
# LE, global var defined in exec
- [0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ [0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
[0-9a-f]+: 00 00 *
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
@@ -252,7 +252,7 @@ Disassembly of section .text:
# bl2+2
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
- [0-9a-f]+: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0,%rdx
+ [0-9a-f]+: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rdx
[0-9a-f]+: 00 00 *
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
@@ -262,7 +262,7 @@ Disassembly of section .text:
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
# LE, hidden var defined in exec, non-canonical sequence
- [0-9a-f]+: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0,%rdx
+ [0-9a-f]+: 64 48 8b 14 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rdx
[0-9a-f]+: 00 00 *
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
@@ -274,7 +274,7 @@ Disassembly of section .text:
[0-9a-f]+: 90[ ]+nop *
# Direct %fs access
# LE, global var defined in exec
- [0-9a-f]+: 64 48 8b 04 25 68 ff[ ]+mov %fs:0xf+68,%rax
+ [0-9a-f]+: 64 48 8b 04 25 68 ff[ ]+mov %fs:0xf+68\(,%riz,1\),%rax
[0-9a-f]+: ff ff *
# sg3
[0-9a-f]+: 90[ ]+nop *
@@ -282,7 +282,7 @@ Disassembly of section .text:
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
# LE, local var
- [0-9a-f]+: 64 4c 8b 14 25 eb ff[ ]+mov %fs:0xf+eb,%r10
+ [0-9a-f]+: 64 4c 8b 14 25 eb ff[ ]+mov %fs:0xf+eb\(,%riz,1\),%r10
[0-9a-f]+: ff ff *
# bl3+3
[0-9a-f]+: 90[ ]+nop *
@@ -290,7 +290,7 @@ Disassembly of section .text:
[0-9a-f]+: 90[ ]+nop *
[0-9a-f]+: 90[ ]+nop *
# LE, hidden var defined in exec
- [0-9a-f]+: 64 48 8b 14 25 a9 ff[ ]+mov %fs:0xf+a9,%rdx
+ [0-9a-f]+: 64 48 8b 14 25 a9 ff[ ]+mov %fs:0xf+a9\(,%riz,1\),%rdx
[0-9a-f]+: ff ff *
# sh3+1
[0-9a-f]+: 90[ ]+nop *
--- binutils/ld/testsuite/ld-x86-64/tlsdesc.dd.fake 2007-04-26 21:22:14.000000000 -0700
+++ binutils/ld/testsuite/ld-x86-64/tlsdesc.dd 2007-09-19 15:42:15.000000000 -0700
@@ -111,7 +111,7 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
# IE against global var
- +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rcx
+[0-9a-f]+: 00 00 *
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
@@ -122,7 +122,7 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
# IE against local var
- +[0-9a-f]+: 64 4c 8b 34 25 00 00[ ]+mov %fs:0x0,%r14
+ +[0-9a-f]+: 64 4c 8b 34 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%r14
+[0-9a-f]+: 00 00 *
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
@@ -133,7 +133,7 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
# IE against hidden and local var
- +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rcx
+[0-9a-f]+: 00 00 *
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
@@ -144,7 +144,7 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
# IE against hidden but not local var
- +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rcx
+[0-9a-f]+: 00 00 *
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
--- binutils/ld/testsuite/ld-x86-64/tlsgd1.dd.fake 2007-08-14 12:48:20.000000000 -0700
+++ binutils/ld/testsuite/ld-x86-64/tlsgd1.dd 2007-09-19 15:42:15.000000000 -0700
@@ -9,6 +9,6 @@
Disassembly of section .text:
[a-f0-9]+ <_start>:
-[ ]*[a-f0-9]+: 64 48 8b 04 25 00 00 00 00 mov %fs:0x0,%rax
+[ ]*[a-f0-9]+: 64 48 8b 04 25 00 00 00 00 mov %fs:0x0\(,%riz,1\),%rax
[ ]*[a-f0-9]+: 48 8d 80 fc ff ff ff lea -0x4\(%rax\),%rax
#pass
--- binutils/ld/testsuite/ld-x86-64/tlsgdesc.dd.fake 2007-04-26 21:22:14.000000000 -0700
+++ binutils/ld/testsuite/ld-x86-64/tlsgdesc.dd 2007-09-19 15:42:15.000000000 -0700
@@ -16,7 +16,7 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
# IE
- +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rcx
+[0-9a-f]+: 00 00 *
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
@@ -27,7 +27,7 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
# IE
- +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rcx
+[0-9a-f]+: 00 00 *
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
@@ -74,7 +74,7 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
# GD -> IE, gd first, after IE use
- +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
+[0-9a-f]+: 00 00 *
+[0-9a-f]+: 48 03 05 f2 01 20 00[ ]+add 0x2001f2\(%rip\),%rax +# 200660 <.*>
# -> R_X86_64_TPOFF64 sG3
@@ -97,7 +97,7 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
- +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
+[0-9a-f]+: 00 00 *
+[0-9a-f]+: 48 03 05 e4 01 20 00[ ]+add 0x2001e4\(%rip\),%rax +# 200680 <.*>
# -> R_X86_64_TPOFF64 sG4
@@ -106,7 +106,7 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
# GD -> IE, gd first, before IE use
- +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
+[0-9a-f]+: 00 00 *
+[0-9a-f]+: 48 03 05 b8 01 20 00[ ]+add 0x2001b8\(%rip\),%rax +# 200668 <.*>
# -> R_X86_64_TPOFF64 sG5
@@ -129,7 +129,7 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
- +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
+[0-9a-f]+: 00 00 *
+[0-9a-f]+: 48 03 05 aa 01 20 00[ ]+add 0x2001aa\(%rip\),%rax +# 200688 <.*>
# -> R_X86_64_TPOFF64 sG6
@@ -138,7 +138,7 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
# IE
- +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rcx
+[0-9a-f]+: 00 00 *
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
@@ -149,7 +149,7 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
# IE
- +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +[0-9a-f]+: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rcx
+[0-9a-f]+: 00 00 *
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
--- binutils/ld/testsuite/ld-x86-64/tlsld1.dd.fake 2007-08-14 12:48:20.000000000 -0700
+++ binutils/ld/testsuite/ld-x86-64/tlsld1.dd 2007-09-19 15:42:15.000000000 -0700
@@ -9,5 +9,5 @@
Disassembly of section .text:
[a-f0-9]+ <_start>:
-[ ]*[a-f0-9]+: 66 66 66 64 48 8b 04 25 00 00 00 00 mov %fs:0x0,%rax
+[ ]*[a-f0-9]+: 66 66 66 64 48 8b 04 25 00 00 00 00 mov %fs:0x0\(,%riz,1\),%rax
#pass
--- binutils/ld/testsuite/ld-x86-64/tlspic.dd.fake 2007-04-26 21:22:14.000000000 -0700
+++ binutils/ld/testsuite/ld-x86-64/tlspic.dd 2007-09-19 15:42:15.000000000 -0700
@@ -28,7 +28,7 @@ Disassembly of section .text:
+101a: 90[ ]+nop *
+101b: 90[ ]+nop *
# GD -> IE because variable is referenced through IE too
- +101c: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ +101c: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
+1023: 00 00 *
+1025: 48 03 05 84 03 20 00[ ]+add 0x200384\(%rip\),%rax +# 2013b0 <.*>
# -> R_X86_64_TPOFF64 sg2
@@ -48,7 +48,7 @@ Disassembly of section .text:
+1042: 90[ ]+nop *
+1043: 90[ ]+nop *
# GD -> IE against local variable referenced through IE too
- +1044: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ +1044: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
+104b: 00 00 *
+104d: 48 03 05 fc 02 20 00[ ]+add 0x2002fc\(%rip\),%rax +# 201350 <.*>
# -> R_X86_64_TPOFF64 *ABS*+0x24
@@ -68,7 +68,7 @@ Disassembly of section .text:
+106a: 90[ ]+nop *
+106b: 90[ ]+nop *
# GD -> IE against hidden and local variable referenced through IE too
- +106c: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ +106c: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
+1073: 00 00 *
+1075: 48 03 05 4c 03 20 00[ ]+add 0x20034c\(%rip\),%rax +# 2013c8 <.*>
# -> R_X86_64_TPOFF64 *ABS*+0x44
@@ -88,7 +88,7 @@ Disassembly of section .text:
+1092: 90[ ]+nop *
+1093: 90[ ]+nop *
# GD -> IE against hidden but not local variable referenced through IE too
- +1094: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax
+ +1094: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rax
+109b: 00 00 *
+109d: 48 03 05 dc 02 20 00[ ]+add 0x2002dc\(%rip\),%rax +# 201380 <.*>
# -> R_X86_64_TPOFF64 *ABS*+0x64
@@ -140,7 +140,7 @@ Disassembly of section .text:
+110a: 90[ ]+nop *
+110b: 90[ ]+nop *
# IE against global var
- +110c: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +110c: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rcx
+1113: 00 00 *
+1115: 90[ ]+nop *
+1116: 90[ ]+nop *
@@ -151,7 +151,7 @@ Disassembly of section .text:
+1120: 90[ ]+nop *
+1121: 90[ ]+nop *
# IE against local var
- +1122: 64 4c 8b 34 25 00 00[ ]+mov %fs:0x0,%r14
+ +1122: 64 4c 8b 34 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%r14
+1129: 00 00 *
+112b: 90[ ]+nop *
+112c: 90[ ]+nop *
@@ -162,7 +162,7 @@ Disassembly of section .text:
+1136: 90[ ]+nop *
+1137: 90[ ]+nop *
# IE against hidden and local var
- +1138: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +1138: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rcx
+113f: 00 00 *
+1141: 90[ ]+nop *
+1142: 90[ ]+nop *
@@ -173,7 +173,7 @@ Disassembly of section .text:
+114c: 90[ ]+nop *
+114d: 90[ ]+nop *
# IE against hidden but not local var
- +114e: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0,%rcx
+ +114e: 64 48 8b 0c 25 00 00[ ]+mov %fs:0x0\(,%riz,1\),%rcx
+1155: 00 00 *
+1157: 90[ ]+nop *
+1158: 90[ ]+nop *
--- binutils/opcodes/i386-dis.c.fake 2007-09-19 12:44:05.000000000 -0700
+++ binutils/opcodes/i386-dis.c 2007-09-19 15:34:09.000000000 -0700
@@ -1353,6 +1353,8 @@ static const char **names16;
static const char **names8;
static const char **names8rex;
static const char **names_seg;
+static const char *index64;
+static const char *index32;
static const char **index16;
static const char *intel_names64[] = {
@@ -1377,6 +1379,8 @@ static const char *intel_names8rex[] = {
static const char *intel_names_seg[] = {
"es", "cs", "ss", "ds", "fs", "gs", "?", "?",
};
+static const char *intel_index64 = "riz";
+static const char *intel_index32 = "eiz";
static const char *intel_index16[] = {
"bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
};
@@ -1403,6 +1407,8 @@ static const char *att_names8rex[] = {
static const char *att_names_seg[] = {
"%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
};
+static const char *att_index64 = "%riz";
+static const char *att_index32 = "%eiz";
static const char *att_index16[] = {
"%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
};
@@ -5001,6 +5007,8 @@ print_insn (bfd_vma pc, disassemble_info
names8 = intel_names8;
names8rex = intel_names8rex;
names_seg = intel_names_seg;
+ index64 = intel_index64;
+ index32 = intel_index32;
index16 = intel_index16;
open_char = '[';
close_char = ']';
@@ -5015,6 +5023,8 @@ print_insn (bfd_vma pc, disassemble_info
names8 = att_names8;
names8rex = att_names8rex;
names_seg = att_names_seg;
+ index64 = att_index64;
+ index32 = att_index32;
index16 = att_index16;
open_char = '(';
close_char = ')';
@@ -6301,6 +6311,7 @@ OP_E_extended (int bytemode, int sizefla
{
/* 32/64 bit address mode */
int havedisp;
+ int haveoffset;
int havesib;
int havebase;
int haveindex;
@@ -6318,9 +6329,7 @@ OP_E_extended (int bytemode, int sizefla
havesib = 1;
FETCH_DATA (the_info, codep + 1);
index = (*codep >> 3) & 7;
- if (address_mode == mode_64bit || index != 0x4)
- /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
- scale = (*codep >> 6) & 3;
+ scale = (*codep >> 6) & 3;
base = *codep & 7;
USED_REX (REX_X);
if (rex & REX_X)
@@ -6360,7 +6369,8 @@ OP_E_extended (int bytemode, int sizefla
break;
}
- havedisp = havebase || (havesib && (haveindex || scale != 0));
+ havedisp = havebase || (havesib && haveindex);
+ haveoffset = havebase || havesib;
if (!intel_syntax)
if (modrm.mod != 0 || (base & 7) == 5)
@@ -6377,7 +6387,7 @@ OP_E_extended (int bytemode, int sizefla
}
}
- if (havedisp || (intel_syntax && riprel))
+ if (haveoffset || (intel_syntax && riprel))
{
*obufp++ = open_char;
if (intel_syntax && riprel)
@@ -6391,29 +6401,28 @@ OP_E_extended (int bytemode, int sizefla
? names64[base] : names32[base]);
if (havesib)
{
- if (haveindex)
- {
- if (!intel_syntax || havebase)
- {
- *obufp++ = separator_char;
- *obufp = '\0';
- }
- oappend (address_mode == mode_64bit
- && (sizeflag & AFLAG)
- ? names64[index] : names32[index]);
- }
- if (scale != 0 || haveindex)
+ if (!intel_syntax || havebase)
{
- *obufp++ = scale_char;
+ *obufp++ = separator_char;
*obufp = '\0';
- sprintf (scratchbuf, "%d", 1 << scale);
- oappend (scratchbuf);
}
+ if (haveindex)
+ oappend (address_mode == mode_64bit
+ && (sizeflag & AFLAG)
+ ? names64[index] : names32[index]);
+ else
+ oappend (address_mode == mode_64bit
+ && (sizeflag & AFLAG)
+ ? index64 : index32);
+ *obufp++ = scale_char;
+ *obufp = '\0';
+ sprintf (scratchbuf, "%d", 1 << scale);
+ oappend (scratchbuf);
}
if (intel_syntax
&& (disp || modrm.mod != 0 || (base & 7) == 5))
{
- if ((bfd_signed_vma) disp >= 0)
+ if (!havedisp || (bfd_signed_vma) disp >= 0)
{
*obufp++ = '+';
*obufp = '\0';
@@ -6425,7 +6434,10 @@ OP_E_extended (int bytemode, int sizefla
disp = - (bfd_signed_vma) disp;
}
- print_displacement (scratchbuf, disp);
+ if (havedisp)
+ print_displacement (scratchbuf, disp);
+ else
+ print_operand_value (scratchbuf, 1, disp);
oappend (scratchbuf);
}
--- binutils/opcodes/i386-opc.h.fake 2007-09-19 10:01:40.000000000 -0700
+++ binutils/opcodes/i386-opc.h 2007-09-19 13:33:18.000000000 -0700
@@ -444,6 +444,9 @@ typedef struct
#define RegRex64 0x2 /* Extended 8 bit register. */
unsigned int reg_num;
#define RegRip ((unsigned int ) ~0)
+/* EIZ and RIZ are fake index registers. */
+#define RegEiz (RegRip - 1)
+#define RegRiz (RegEiz - 1)
}
reg_entry;
--- binutils/opcodes/i386-reg.tbl.fake 2007-09-19 10:01:40.000000000 -0700
+++ binutils/opcodes/i386-reg.tbl 2007-09-19 13:32:40.000000000 -0700
@@ -190,6 +190,10 @@ xmm15, RegXMM, RegRex, 7
// No type will make this register rejected for all purposes except
// for addressing. This saves creating one extra type for RIP.
rip, BaseIndex, 0, RegRip
+// No type will make these registers rejected for all purposes except
+// for addressing.
+eiz, BaseIndex, 0, RegEiz
+riz, BaseIndex, 0, RegRiz
// fp regs.
st(0), FloatReg|FloatAcc, 0, 0
st(1), FloatReg, 0, 1
--- binutils/opcodes/i386-tbl.h.fake 2007-09-19 12:44:56.000000000 -0700
+++ binutils/opcodes/i386-tbl.h 2007-09-19 13:50:57.000000000 -0700
@@ -13279,6 +13279,14 @@ const reg_entry i386_regtab[] =
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
0, RegRip },
+ { "eiz",
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ 0, RegEiz },
+ { "riz",
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ 0, RegRiz },
{ "st(0)",
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 } },
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