disassembly options

[Mike Frysinger]

On Friday 07 September 2007, Dave Korn wrote:
> On 07 September 2007 15:52, Nick Clifton wrote:
> > Hi Robin,
> >
> >> It would be nice to have something that automatically told me that the
> >> MMR at 0xffc00000 == "PLL_CTL", (the name actually means something - and
> >> is referenced in the standard processor documentation), and get
> >> something that looks like:
> >>
> >>     20e4:       4a e1 c0 ff     P2.H = 0xffc0   /* 0xffc01f24 */;
> >>     20e8:       0a e1 00 00     P2.L = 0x0      /* 0xffc00000 */;
> >>     20ec:       10 95           R0 = W[P2] (Z)  /* PLL_CTL */;
> >
> > I think that this would be useful.
> >
> > You may find however that implementing it in a nice generic way will mean
> > that you will have to rewrite the symbol/address decoding part of the
> >   disassembler. Not that this would be a bad thing, it could certainly
> > use a tidy up.
>
>   Won't the real tricky bit be in performing the data flow analysis?  There
> are relocs on those two assignments.  There's nothing on the load indirect.
>  I don't see how it could handle (sorry, don't speak bfin assembler, so
> this is a bit made up) stuff like:

there are no relocs ... everything in the 0xffc00000 - 0xffffffff range are 
MMR's on a Blackfin proc
-mike
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