PATCH: Remove memory check on SVME instructions

[Jan Beulich]

>>> "H.J. Lu" <hjl@lucon.org> 09/05/07 12:48 AM >>>
>On Tue, Sep 04, 2007 at 08:27:09PM +0100, Jan Beulich wrote:
>> >>> "H.J. Lu" <hjl@lucon.org> 09/04/07 4:08 PM >>>
>> >On Thu, Aug 30, 2007 at 07:19:02PM -0500, rajagopal, dwarak wrote:
>> >> H.J.,
>> >> 
>> >> Yes, SVM instructions have register only operand.  So please fix this.
>> >> 
>> >> Thanks,
>> >> Dwarak
>> >> 
>> >
>> >I am checking this patch to remove memory check on SVME instructions.
>> 
>> Why? Did you check that you get proper warnings/errors for invalid operand
>> specifications after you removed these checks?
>> 
>
>SVME instructions don't take any memory operand. You will get an
>error if you try to use an memory operand.

They really do, just the addressing is so that only rAX can be used. If you check
the svme test case, you'll see that there are explict uses of memory operands. In
the original patch implementation it may not have been that way, but since the
meaning of the operands is memory-like, we agreed on a memory-like notation
iirc.

Jan