[PATCH] opcodes: Add MIPS R3000 and R4000/R4400 CP0 register names
Maciej W. Rozycki
macro@linux-mips.org
Mon Oct 1 16:04:00 GMT 2007
Hello,
This is a change to add CP0 register names for the R3000 and R4000/R4400
processors. Useful with the "-M cp0-names=CPU" option for `objdump'.
opcodes/:
2007-10-01 Maciej W. Rozycki <macro@linux-mips.org>
* opcodes/mips-dis.c (mips_cp0_names_r3000): New definition.
(mips_cp0_names_r4000): Likewise.
(mips_arch_choices): Link to the above as appropriate.
gas/testsuite/:
2007-10-01 Maciej W. Rozycki <macro@linux-mips.org>
* gas/mips/cp0-names-r3000.d: New test for R3000 CP0 symbolic
disassembly.
* gas/mips/cp0-names-r4000.d: New test for R4000/R4400 symbolic
CP0 disassembly.
* mips/mips.exp: Run the new tests.
Tested natively on mips64el-linux-gnu with no regressions; the new cases
do pass too. OK to apply?
Maciej
binutils-2.18-mips-reg-names-r3k4k.patch
diff -up --recursive --new-file binutils-2.18.macro/gas/testsuite/gas/mips/cp0-names-r3000.d binutils-2.18/gas/testsuite/gas/mips/cp0-names-r3000.d
--- binutils-2.18.macro/gas/testsuite/gas/mips/cp0-names-r3000.d 1970-01-01 00:00:00.000000000 +0000
+++ binutils-2.18/gas/testsuite/gas/mips/cp0-names-r3000.d 2007-10-01 01:02:54.000000000 +0000
@@ -0,0 +1,43 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp0-names=r3000
+#name: MIPS CP0 register disassembly (r3000)
+#as: -32 -march=r3000
+#source: cp0-names.s
+
+# Check objdump's handling of -M cp0-names=foo options.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 40800000 mtc0 \$0,c0_index
+[0-9a-f]+ <[^>]*> 40800800 mtc0 \$0,c0_random
+[0-9a-f]+ <[^>]*> 40801000 mtc0 \$0,c0_entrylo
+[0-9a-f]+ <[^>]*> 40801800 mtc0 \$0,\$3
+[0-9a-f]+ <[^>]*> 40802000 mtc0 \$0,c0_context
+[0-9a-f]+ <[^>]*> 40802800 mtc0 \$0,\$5
+[0-9a-f]+ <[^>]*> 40803000 mtc0 \$0,\$6
+[0-9a-f]+ <[^>]*> 40803800 mtc0 \$0,\$7
+[0-9a-f]+ <[^>]*> 40804000 mtc0 \$0,c0_badvaddr
+[0-9a-f]+ <[^>]*> 40804800 mtc0 \$0,\$9
+[0-9a-f]+ <[^>]*> 40805000 mtc0 \$0,c0_entryhi
+[0-9a-f]+ <[^>]*> 40805800 mtc0 \$0,\$11
+[0-9a-f]+ <[^>]*> 40806000 mtc0 \$0,c0_sr
+[0-9a-f]+ <[^>]*> 40806800 mtc0 \$0,c0_cause
+[0-9a-f]+ <[^>]*> 40807000 mtc0 \$0,c0_epc
+[0-9a-f]+ <[^>]*> 40807800 mtc0 \$0,c0_prid
+[0-9a-f]+ <[^>]*> 40808000 mtc0 \$0,\$16
+[0-9a-f]+ <[^>]*> 40808800 mtc0 \$0,\$17
+[0-9a-f]+ <[^>]*> 40809000 mtc0 \$0,\$18
+[0-9a-f]+ <[^>]*> 40809800 mtc0 \$0,\$19
+[0-9a-f]+ <[^>]*> 4080a000 mtc0 \$0,\$20
+[0-9a-f]+ <[^>]*> 4080a800 mtc0 \$0,\$21
+[0-9a-f]+ <[^>]*> 4080b000 mtc0 \$0,\$22
+[0-9a-f]+ <[^>]*> 4080b800 mtc0 \$0,\$23
+[0-9a-f]+ <[^>]*> 4080c000 mtc0 \$0,\$24
+[0-9a-f]+ <[^>]*> 4080c800 mtc0 \$0,\$25
+[0-9a-f]+ <[^>]*> 4080d000 mtc0 \$0,\$26
+[0-9a-f]+ <[^>]*> 4080d800 mtc0 \$0,\$27
+[0-9a-f]+ <[^>]*> 4080e000 mtc0 \$0,\$28
+[0-9a-f]+ <[^>]*> 4080e800 mtc0 \$0,\$29
+[0-9a-f]+ <[^>]*> 4080f000 mtc0 \$0,\$30
+[0-9a-f]+ <[^>]*> 4080f800 mtc0 \$0,\$31
+ \.\.\.
diff -up --recursive --new-file binutils-2.18.macro/gas/testsuite/gas/mips/cp0-names-r4000.d binutils-2.18/gas/testsuite/gas/mips/cp0-names-r4000.d
--- binutils-2.18.macro/gas/testsuite/gas/mips/cp0-names-r4000.d 1970-01-01 00:00:00.000000000 +0000
+++ binutils-2.18/gas/testsuite/gas/mips/cp0-names-r4000.d 2007-10-01 01:46:51.000000000 +0000
@@ -0,0 +1,43 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric
+#name: MIPS CP0 register disassembly
+#as: -32 -march=r4000
+#source: cp0-names.s
+
+# Check objdump's handling of -M cp0-names=foo options.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 40800000 mtc0 \$0,c0_index
+[0-9a-f]+ <[^>]*> 40800800 mtc0 \$0,c0_random
+[0-9a-f]+ <[^>]*> 40801000 mtc0 \$0,c0_entrylo0
+[0-9a-f]+ <[^>]*> 40801800 mtc0 \$0,c0_entrylo1
+[0-9a-f]+ <[^>]*> 40802000 mtc0 \$0,c0_context
+[0-9a-f]+ <[^>]*> 40802800 mtc0 \$0,c0_pagemask
+[0-9a-f]+ <[^>]*> 40803000 mtc0 \$0,c0_wired
+[0-9a-f]+ <[^>]*> 40803800 mtc0 \$0,\$7
+[0-9a-f]+ <[^>]*> 40804000 mtc0 \$0,c0_badvaddr
+[0-9a-f]+ <[^>]*> 40804800 mtc0 \$0,c0_count
+[0-9a-f]+ <[^>]*> 40805000 mtc0 \$0,c0_entryhi
+[0-9a-f]+ <[^>]*> 40805800 mtc0 \$0,c0_compare
+[0-9a-f]+ <[^>]*> 40806000 mtc0 \$0,c0_sr
+[0-9a-f]+ <[^>]*> 40806800 mtc0 \$0,c0_cause
+[0-9a-f]+ <[^>]*> 40807000 mtc0 \$0,c0_epc
+[0-9a-f]+ <[^>]*> 40807800 mtc0 \$0,c0_prid
+[0-9a-f]+ <[^>]*> 40808000 mtc0 \$0,c0_config
+[0-9a-f]+ <[^>]*> 40808800 mtc0 \$0,c0_lladdr
+[0-9a-f]+ <[^>]*> 40809000 mtc0 \$0,c0_watchlo
+[0-9a-f]+ <[^>]*> 40809800 mtc0 \$0,c0_watchhi
+[0-9a-f]+ <[^>]*> 4080a000 mtc0 \$0,c0_xcontext
+[0-9a-f]+ <[^>]*> 4080a800 mtc0 \$0,\$21
+[0-9a-f]+ <[^>]*> 4080b000 mtc0 \$0,\$22
+[0-9a-f]+ <[^>]*> 4080b800 mtc0 \$0,\$23
+[0-9a-f]+ <[^>]*> 4080c000 mtc0 \$0,\$24
+[0-9a-f]+ <[^>]*> 4080c800 mtc0 \$0,\$25
+[0-9a-f]+ <[^>]*> 4080d000 mtc0 \$0,c0_ecc
+[0-9a-f]+ <[^>]*> 4080d800 mtc0 \$0,c0_cacheerr
+[0-9a-f]+ <[^>]*> 4080e000 mtc0 \$0,c0_taglo
+[0-9a-f]+ <[^>]*> 4080e800 mtc0 \$0,c0_taghi
+[0-9a-f]+ <[^>]*> 4080f000 mtc0 \$0,c0_errorepc
+[0-9a-f]+ <[^>]*> 4080f800 mtc0 \$0,\$31
+ \.\.\.
diff -up --recursive --new-file binutils-2.18.macro/gas/testsuite/gas/mips/mips.exp binutils-2.18/gas/testsuite/gas/mips/mips.exp
--- binutils-2.18.macro/gas/testsuite/gas/mips/mips.exp 2007-08-06 20:00:14.000000000 +0000
+++ binutils-2.18/gas/testsuite/gas/mips/mips.exp 2007-10-01 01:56:38.000000000 +0000
@@ -696,6 +696,11 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "fpr-names-64"
run_dump_test "cp0-names-numeric"
+ run_dump_test "cp0-names-r3000"
+ run_dump_test "cp0-names-r4000" \
+ { { {name} {(r4000)} } { {objdump} {-M cp0-names=r4000} } }
+ run_dump_test "cp0-names-r4000" \
+ { { {name} {(r4400)} } { {objdump} {-M cp0-names=r4400} } }
run_dump_test "cp0-names-mips32"
run_dump_test "cp0-names-mips32r2"
run_dump_test "cp0-names-mips64"
diff -up --recursive --new-file binutils-2.18.macro/opcodes/mips-dis.c binutils-2.18/opcodes/mips-dis.c
--- binutils-2.18.macro/opcodes/mips-dis.c 2007-08-06 19:59:07.000000000 +0000
+++ binutils-2.18/opcodes/mips-dis.c 2007-10-01 00:17:32.000000000 +0000
@@ -124,6 +124,30 @@ static const char * const mips_cp0_names
"$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31"
};
+static const char * const mips_cp0_names_r3000[32] =
+{
+ "c0_index", "c0_random", "c0_entrylo", "$3",
+ "c0_context", "$5", "$6", "$7",
+ "c0_badvaddr", "$9", "c0_entryhi", "$11",
+ "c0_sr", "c0_cause", "c0_epc", "c0_prid",
+ "$16", "$17", "$18", "$19",
+ "$20", "$21", "$22", "$23",
+ "$24", "$25", "$26", "$27",
+ "$28", "$29", "$30", "$31",
+};
+
+static const char * const mips_cp0_names_r4000[32] =
+{
+ "c0_index", "c0_random", "c0_entrylo0", "c0_entrylo1",
+ "c0_context", "c0_pagemask", "c0_wired", "$7",
+ "c0_badvaddr", "c0_count", "c0_entryhi", "c0_compare",
+ "c0_sr", "c0_cause", "c0_epc", "c0_prid",
+ "c0_config", "c0_lladdr", "c0_watchlo", "c0_watchhi",
+ "c0_xcontext", "$21", "$22", "$23",
+ "$24", "$25", "c0_ecc", "c0_cacheerr",
+ "c0_taglo", "c0_taghi", "c0_errorepc", "$31",
+};
+
static const char * const mips_cp0_names_mips3264[32] =
{
"c0_index", "c0_random", "c0_entrylo0", "c0_entrylo1",
@@ -346,11 +370,11 @@ const struct mips_arch_choice mips_arch_
mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
{ "r3000", 1, bfd_mach_mips3000, CPU_R3000, ISA_MIPS1,
- mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
+ mips_cp0_names_r3000, NULL, 0, mips_hwr_names_numeric },
{ "r3900", 1, bfd_mach_mips3900, CPU_R3900, ISA_MIPS1,
mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
{ "r4000", 1, bfd_mach_mips4000, CPU_R4000, ISA_MIPS3,
- mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
+ mips_cp0_names_r4000, NULL, 0, mips_hwr_names_numeric },
{ "r4010", 1, bfd_mach_mips4010, CPU_R4010, ISA_MIPS2,
mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
{ "vr4100", 1, bfd_mach_mips4100, CPU_VR4100, ISA_MIPS3,
@@ -362,7 +386,7 @@ const struct mips_arch_choice mips_arch_
{ "r4300", 1, bfd_mach_mips4300, CPU_R4300, ISA_MIPS3,
mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
{ "r4400", 1, bfd_mach_mips4400, CPU_R4400, ISA_MIPS3,
- mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
+ mips_cp0_names_r4000, NULL, 0, mips_hwr_names_numeric },
{ "r4600", 1, bfd_mach_mips4600, CPU_R4600, ISA_MIPS3,
mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
{ "r4650", 1, bfd_mach_mips4650, CPU_R4650, ISA_MIPS3,
More information about the Binutils
mailing list