PATCH: Properly handle x86 crc32 in Intel mode

H. J. Lu hjl@lucon.org
Thu May 3 13:33:00 GMT 2007


On Thu, May 03, 2007 at 07:59:18AM +0100, Jan Beulich wrote:
> >> >crc32 is a very special instruction and doesn't follow the normal
> >> >rule.
> >> 
> >> I don't think it's that special - it's very close to movzx/movsx. And hence it
> >> should be implemented similarly.
> >
> >They are close, but different when treating data size prefix. Also
> >I want to use the same opcode entries for both AT&T and Intel modes.
> 
> Sure, I can't see why this shouldn't be possible (though one of my long term
> plans is to add functionality to allow a clean split between Intel and AT&T
> syntax, so that in either mode insns/suffixes valid only in the other mode
> cannot be used without at least a warning). And this I continue to believe
> without suffix use in Intel mode.
> 
> And unfortunately once again I have to complain that you committed the
> patch too quickly (despite saying you'd wait for a day or two you really
> didn't seem to). As the Intel mode maintainer, I think I should be allowed
> to request change like I did, but if you commit things before I even have a
> chance to look at the patch, this is not really appropriate I'm afraid.

Sorry for that.

> 
> >I can change the disassembler not to generate the suffix for Intel
> >syntax. Should -Msuffix generate the suffix for Intel syntax?
> 
> In my opinion it shouldn't, but this is inconsistent at present anyway I

Here is a patch.

> >
> >Oops. I have double checked this before. 0x66 is treated as data size
> >prefix on source, not destination, which is the difference between
> >crc32 and movsx/movzx.
> 
> And this is what I asked to be written in the SDM explicitly, in the hope that
> you can get the responsible people to do so.
> 

I will ask.

Thanks.


H.J.
----
gas/testsuite/

2007-05-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/crc32-intel.d: Remove suffix from crc32.
	* gas/i386/x86-64-crc32-intel.d: Likewise.

opcodes/

2007-05-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.

--- binutils/gas/testsuite/gas/i386/crc32-intel.d.suffix	2007-05-01 05:59:24.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/crc32-intel.d	2007-05-03 06:27:14.000000000 -0700
@@ -7,26 +7,26 @@
 Disassembly of section .text:
 
 0+ <foo>:
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32b eax,BYTE PTR \[esi\]
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32w eax,WORD PTR \[esi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32d eax,DWORD PTR \[esi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32d eax,DWORD PTR \[esi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32b eax,al
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32b eax,al
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32w eax,ax
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32w eax,ax
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32d eax,eax
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32d eax,eax
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32b eax,BYTE PTR \[esi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32b eax,BYTE PTR \[esi\]
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32w eax,WORD PTR \[esi\]
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32w eax,WORD PTR \[esi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32d eax,DWORD PTR \[esi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32d eax,DWORD PTR \[esi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32b eax,al
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32b eax,al
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32w eax,ax
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32w eax,ax
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32d eax,eax
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32d eax,eax
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32  eax,BYTE PTR \[esi\]
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32  eax,WORD PTR \[esi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32  eax,DWORD PTR \[esi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32  eax,DWORD PTR \[esi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32  eax,al
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32  eax,al
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32  eax,ax
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32  eax,ax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32  eax,eax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32  eax,eax
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32  eax,BYTE PTR \[esi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32  eax,BYTE PTR \[esi\]
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32  eax,WORD PTR \[esi\]
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32  eax,WORD PTR \[esi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32  eax,DWORD PTR \[esi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32  eax,DWORD PTR \[esi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32  eax,al
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32  eax,al
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32  eax,ax
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32  eax,ax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32  eax,eax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32  eax,eax
 #pass
--- binutils/gas/testsuite/gas/i386/x86-64-crc32-intel.d.suffix	2007-05-01 05:59:24.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86-64-crc32-intel.d	2007-05-03 06:27:23.000000000 -0700
@@ -7,40 +7,40 @@
 Disassembly of section .text:
 
 0+ <foo>:
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32b eax,BYTE PTR \[rsi\]
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 06    	crc32b rax,BYTE PTR \[rsi\]
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32w eax,WORD PTR \[rsi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32d eax,DWORD PTR \[rsi\]
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 06    	crc32q rax,QWORD PTR \[rsi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32d eax,DWORD PTR \[rsi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32b eax,al
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32b eax,al
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32b rax,al
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32b rax,al
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32w eax,ax
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32w eax,ax
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32d eax,eax
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32d eax,eax
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32q rax,rax
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32q rax,rax
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 06    	crc32b rax,BYTE PTR \[rsi\]
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 06    	crc32b rax,BYTE PTR \[rsi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32b eax,BYTE PTR \[rsi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32b eax,BYTE PTR \[rsi\]
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32w eax,WORD PTR \[rsi\]
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32w eax,WORD PTR \[rsi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32d eax,DWORD PTR \[rsi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32d eax,DWORD PTR \[rsi\]
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 06    	crc32q rax,QWORD PTR \[rsi\]
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 06    	crc32q rax,QWORD PTR \[rsi\]
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32b eax,al
-[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32b eax,al
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32b rax,al
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32b rax,al
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32w eax,ax
-[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32w eax,ax
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32d eax,eax
-[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32d eax,eax
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32q rax,rax
-[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32q rax,rax
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32  eax,BYTE PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 06    	crc32  rax,BYTE PTR \[rsi\]
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32  eax,WORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32  eax,DWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 06    	crc32  rax,QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32  eax,DWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32  eax,al
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32  eax,al
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32  rax,al
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32  rax,al
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32  eax,ax
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32  eax,ax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32  eax,eax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32  eax,eax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32  rax,rax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32  rax,rax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 06    	crc32  rax,BYTE PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 06    	crc32  rax,BYTE PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32  eax,BYTE PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32  eax,BYTE PTR \[rsi\]
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32  eax,WORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32  eax,WORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32  eax,DWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32  eax,DWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 06    	crc32  rax,QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 06    	crc32  rax,QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32  eax,al
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32  eax,al
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32  rax,al
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32  rax,al
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32  eax,ax
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32  eax,ax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32  eax,eax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32  eax,eax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32  rax,rax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32  rax,rax
 #pass
--- binutils/opcodes/i386-dis.c.suffix	2007-05-01 05:59:46.000000000 -0700
+++ binutils/opcodes/i386-dis.c	2007-05-03 06:22:03.000000000 -0700
@@ -6384,14 +6384,20 @@ CRC32_Fixup (int bytemode, int sizeflag)
   switch (bytemode)
     {
     case b_mode:
+      if (intel_syntax)
+	break;
+
       *p++ = 'b';
       break;
     case v_mode:
+      if (intel_syntax)
+	break;
+
       USED_REX (REX_W);
       if (rex & REX_W)
 	*p++ = 'q';
       else if (sizeflag & DFLAG)
-	*p++ = intel_syntax ? 'd' : 'l';
+	*p++ = 'l';
       else
 	*p++ = 'w';
       used_prefixes |= (prefixes & PREFIX_DATA);



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