[patch] NEON vext error

Paul Brook paul@codesourcery.com
Fri Oct 27 09:41:00 GMT 2006


gas incorrectly rejects some forms of the vext instruction. When using the 
quadword form, immediates not larger then to 15 are allowed.

Tested with cross to arm-none-eabi.
Ok?

Paul

2006-10-26  Paul Brook  <paul@codesourcery.com>

	gas/
	* config/tc-arm.c (do_neon_ext): Enforce immediate range.
	(insns): Use I15 for vext.

	gas/testsute/
	* gas/arm/neon-cov.s: Add new vext test.
	* gas/arm/neon-cov.d: Ditto.

Index: gas/config/tc-arm.c
===================================================================
RCS file: /var/cvsroot/src-cvs/src/gas/config/tc-arm.c,v
retrieving revision 1.250.2.37
diff -u -p -r1.250.2.37 tc-arm.c
--- gas/config/tc-arm.c	19 Sep 2006 18:44:37 -0000	1.250.2.37
+++ gas/config/tc-arm.c	26 Oct 2006 18:06:06 -0000
@@ -12682,6 +12690,7 @@ do_neon_ext (void)
   struct neon_type_el et = neon_check_type (3, rs,
     N_EQK, N_EQK, N_8 | N_16 | N_32 | N_64 | N_KEY);
   unsigned imm = (inst.operands[3].imm * et.size) / 8;
+  constraint (imm >= 8 * neon_quad (rs), _("shift out of range"));
   inst.instruction |= LOW4 (inst.operands[0].reg) << 12;
   inst.instruction |= HI1 (inst.operands[0].reg) << 22;
   inst.instruction |= LOW4 (inst.operands[1].reg) << 16;
@@ -15782,8 +15791,8 @@ static const struct asm_opcode insns[] =
  nUF(vmull,     vmull,   3, (RNQ, RND, RND_RNSC), neon_vmull),
 
   /* Extract. Size 8.  */
- NUF(vext,      0b00000, 4, (RNDQ, oRNDQ, RNDQ, I7), neon_ext),
- NUF(vextq,     0b00000, 4, (RNQ,  oRNQ,  RNQ,  I7), neon_ext),
+ NUF(vext,      0b00000, 4, (RNDQ, oRNDQ, RNDQ, I15), neon_ext),
+ NUF(vextq,     0b00000, 4, (RNQ,  oRNQ,  RNQ,  I15), neon_ext),
 
   /* Two registers, miscellaneous.  */
   /* Reverse. Sizes 8 16 32 (must be < size in opcode).  */
Index: gas/testsuite/gas/arm/neon-cov.d
===================================================================
RCS file: /var/cvsroot/src-cvs/src/gas/testsuite/gas/arm/neon-cov.d,v
retrieving revision 1.1.2.5
diff -u -p -r1.1.2.5 neon-cov.d
--- gas/testsuite/gas/arm/neon-cov.d	18 Sep 2006 18:29:57 -0000	1.1.2.5
+++ gas/testsuite/gas/arm/neon-cov.d	26 Oct 2006 18:13:54 -0000
@@ -1338,6 +1338,7 @@ Disassembly of section \.text:
 0[0-9a-f]+ <[^>]+> f2b00040 	vext\.8	q0, q0, q0, #0
 0[0-9a-f]+ <[^>]+> f2b00040 	vext\.8	q0, q0, q0, #0
 0[0-9a-f]+ <[^>]+> f2b00000 	vext\.8	d0, d0, d0, #0
+0[0-9a-f]+ <[^>]+> f2b00840 	vext\.8	q0, q0, q0, #8
 0[0-9a-f]+ <[^>]+> f3b00040 	vrev64\.8	q0, q0
 0[0-9a-f]+ <[^>]+> f3b00040 	vrev64\.8	q0, q0
 0[0-9a-f]+ <[^>]+> f3b00000 	vrev64\.8	d0, d0
Index: gas/testsuite/gas/arm/neon-cov.s
===================================================================
RCS file: /var/cvsroot/src-cvs/src/gas/testsuite/gas/arm/neon-cov.s,v
retrieving revision 1.1.2.3
diff -u -p -r1.1.2.3 neon-cov.s
--- gas/testsuite/gas/arm/neon-cov.s	18 Sep 2006 18:29:57 -0000	1.1.2.3
+++ gas/testsuite/gas/arm/neon-cov.s	26 Oct 2006 18:13:29 -0000
@@ -561,6 +561,7 @@
 	vext.8 q0,q0,q0,0
 	vextq.8 q0,q0,q0,0
 	vext.8 d0,d0,d0,0
+	vext.8 q0,q0,q0,8
 
 	.macro revs op opq vtype
 	\op\vtype q0,q0



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