[PATCH] Better checking of ISA/ASE/ABI options for MIPS gas

[Eric Christopher]

>
> I'm somewhat uncertain about the ABI incompatibility warning for
> wrong FP register widths, does it make sense to force a different
> FP register width in the assembler in some cases?
>

No. No more reading the minds of programmers. :)

btw, the indention on the code in the diff is wacky. I assume it's  
correct in your files?

> @@ -1031,7 +1052,13 @@ static int validate_mips_insn (const str
>  struct mips_cpu_info
>  {
>    const char *name;           /* CPU or ISA name.  */
> -  int is_isa;                 /* Is this an ISA?  (If 0, a CPU.) */
> +  int flags;
> +#define MIPS_CPU_IS_ISA		0x0001	/* Is this an ISA?  (If 0, a CPU.) */
> +#define MIPS_CPU_ASE_SMARTMIPS	0x0002	/* CPU implements SmartMIPS  
> ASE */
> +#define MIPS_CPU_ASE_DSP	0x0004	/* CPU implements DSP ASE */
> +#define MIPS_CPU_ASE_MT		0x0008	/* CPU implements MT ASE */
> +#define MIPS_CPU_ASE_MIPS3D	0x0010	/* CPU implements MIPS-3D ASE */
> +#define MIPS_CPU_ASE_MDMX	0x0020	/* CPU implements MDMX ASE */
>    int isa;                    /* ISA level.  */
>    int cpu;                    /* CPU number (default CPU if ISA).  */
>  };

Ugh. Can you haul these defines out somewhere else? And why change  
the table to include default extensions for the cpu?

>
>    /* End of GCC-shared inference code.  */

You need to make sure that this shared code is the same logic in both  
places - preferably before committing this.

> +
> +#if 0 /* XXX FIXME */
> +  /* 32 bit code with 64 bit FP registers.  */
> +  if (!file_mips_fp32 && ABI_NEEDS_32BIT_REGS (mips_abi))
> +    elf_elfheader (stdoutput)->e_flags |= ???;
> +#endif
>  }
>

???

-eric