PATCH: Fix disassembler for cmpxchg16b

[Jan Beulich]

Thanks!

>>> "H. J. Lu" <hjl@lucon.org> 15.12.06 14:09 >>>
On Fri, Dec 15, 2006 at 10:26:14AM +0000, Jan Beulich wrote:
> May I ask you to use 'oword ptr' instead of 'xmmword ptr' in Intel mode? This
> instruction really has nothing to do with XMM... Jan
> 

I will check in this patch.


H.J.
----
gas/testsuite/

2006-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-inval.s: cmpxchg16b needs oword ptr, instead of
	xmmword ptr.
	* gas/i386/x86_64.s: Likewise.
	* gas/i386/x86-64-inval.l: Updated.

opcodes/

2006-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (o_mode): New for 16-byte operand.
	(intel_operand_size): Generate "OWORD PTR " for o_mode.
	(CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.

--- binutils/gas/testsuite/gas/i386/x86-64-inval.l.oword	2006-12-14 13:22:32.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/x86-64-inval.l	2006-12-15 05:00:32.000000000 -0800
@@ -106,4 +106,4 @@ GAS LISTING .*
   51 [ 	]*retl		# can't have 32-bit stack operands
   52 [ 	]*insertq \$4,\$2,%xmm2,%ebx # The last operand must be XMM register.
   53 [ 	]*.intel_syntax noprefix
-  54 [ 	]*cmpxchg16b dword ptr \[rax\] # Must be xmmword
+  54 [ 	]*cmpxchg16b dword ptr \[rax\] # Must be oword
--- binutils/gas/testsuite/gas/i386/x86-64-inval.s.oword	2006-12-14 13:22:32.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/x86-64-inval.s	2006-12-15 05:00:42.000000000 -0800
@@ -51,4 +51,4 @@ foo:	jcxz foo	# No prefix exists to sele
 	retl		# can't have 32-bit stack operands
 	insertq $4,$2,%xmm2,%ebx # The last operand must be XMM register.
 	.intel_syntax noprefix
-	cmpxchg16b dword ptr [rax] # Must be xmmword
+	cmpxchg16b dword ptr [rax] # Must be oword
--- binutils/gas/testsuite/gas/i386/x86_64.s.oword	2006-12-14 13:22:32.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/x86_64.s	2006-12-15 05:00:08.000000000 -0800
@@ -191,7 +191,7 @@ movq %rax,0xffffffffff332211
 cmpxchg16b (%rax)
 
 .intel_syntax noprefix
-cmpxchg16b xmmword ptr [rax]
+cmpxchg16b oword ptr [rax]
 
 # Get a good alignment.
  .p2align	4,0
--- binutils/opcodes/i386-dis.c.oword	2006-12-14 13:22:30.000000000 -0800
+++ binutils/opcodes/i386-dis.c	2006-12-15 04:58:43.000000000 -0800
@@ -356,6 +356,7 @@ fetch_data (struct disassemble_info *inf
 #define const_1_mode 14
 #define stack_v_mode 15 /* v_mode for stack-related opcodes.  */
 #define z_mode 16 /* non-quad operand size depends on prefixes */
+#define o_mode 17  /* 16-byte operand */
 
 #define es_reg 100
 #define cs_reg 101
@@ -4183,6 +4184,9 @@ intel_operand_size (int bytemode, int si
     case x_mode:
       oappend ("XMMWORD PTR ");
       break;
+    case o_mode:
+      oappend ("OWORD PTR ");
+      break;
     default:
       break;
     }
@@ -5778,7 +5782,7 @@ CMPXCHG8B_Fixup (int bytemode, int sizef
       /* Change cmpxchg8b to cmpxchg16b.  */
       char *p = obuf + strlen (obuf) - 2;
       strcpy (p, "16b");
-      bytemode = x_mode;
+      bytemode = o_mode;
     }
   OP_M (bytemode, sizeflag);
 }