[PATCH] x86 CFI extensions
Jan Beulich
JBeulich@novell.com
Tue Sep 13 18:02:00 GMT 2005
>>> Richard Henderson <rth@twiddle.net> 12.09.05 09:49:14 >>>
>On Mon, Sep 12, 2005 at 09:04:12AM +0200, Jan Beulich wrote:
>> But truly I think the processor-specific pieces of Dwarf's
>> frame unwind spec should provide numbering for the complete set of
>> registers.
>
>Except there is no standards body for this. So *someone* will
>have to make it up.
>
>Make it up and put it in gas and gdb: that will make it a defacto
standard.
This adds to gas a little more than the minimum set of registers
needed
to at least fully represent Linux' pt_regs.
Built and tested on i686-pc-linux-gnu and x86_64-unknown-linux-gnu.
Jan
gas/
2005-09-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (tc_x86_regname_to_dw2regnum): Add selector
registers, floating point control and status words, and mxcsr
as
well as (for 64-bit code) segment base registers and rflags.
---
/home/jbeulich/src/binutils/mainline/2005-09-13/gas/config/tc-i386.c 2005-08-23
16:13:12.000000000 +0200
+++ 2005-09-13/gas/config/tc-i386.c 2005-09-13 14:21:51.000000000
+0200
@@ -6935,7 +6935,10 @@ tc_x86_regname_to_dw2regnum (const char
"xmm0", "xmm1", "xmm2", "xmm3",
"xmm4", "xmm5", "xmm6", "xmm7",
"mm0", "mm1", "mm2", "mm3",
- "mm4", "mm5", "mm6", "mm7"
+ "mm4", "mm5", "mm6", "mm7",
+ "fcw", "fsw", "mxcsr",
+ "es", "cs", "ss", "ds", "fs", "gs", NULL, NULL,
+ "tr", "ldtr"
};
static const char *const regnames_64[] =
{
@@ -6951,7 +6954,12 @@ tc_x86_regname_to_dw2regnum (const char
"st0", "st1", "st2", "st3",
"st4", "st5", "st6", "st7",
"mm0", "mm1", "mm2", "mm3",
- "mm4", "mm5", "mm6", "mm7"
+ "mm4", "mm5", "mm6", "mm7",
+ "rflags",
+ "es", "cs", "ss", "ds", "fs", "gs", NULL, NULL,
+ "fs.base", "gs.base", NULL, NULL,
+ "tr", "ldtr",
+ "mxcsr", "fcw", "fsw"
};
const char *const *regnames;
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