[PATCH] m32r-*-as For a code depended for host word size.

[Kazuhiro Inaoka]

Thanks  Andreas,

> ~0xffff is still 0xffff0000 for 32 bit ints and will be zero extended.
> You probably want ~(bfd_vma)0xffff here.  Alternatively you can use
> 
>           value = ((value & 0xffff) ^ 0x8000) - 0x8000.

It's better code.

Hi Nick,
Should I make and send the patch again?

Regards,

Kazuhiro Inaoka

Andreas Schwab wrote:

>>2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
>>
>>   * cpu/m32r.opc (parse_slo16): Changed for a code depended
>>   for host word size.
>>Index: m32r.opc
>>===================================================================
>>RCS file: /cvs/src/src/cpu/m32r.opc,v
>>retrieving revision 1.6
>>diff -u -p -r1.6 m32r.opc
>>--- m32r.opc	1 Jul 2005 11:16:30 -0000	1.6
>>+++ m32r.opc	14 Oct 2005 07:33:21 -0000
>>@@ -182,7 +182,7 @@ parse_slo16 (CGEN_CPU_DESC cd,
>>         {
>> 	  value &= 0xffff;
>>           if (value & 0x8000)
>>-             value |= 0xffff0000;
>>+             value |= ~0xffff;
>>    
>>
>
>~0xffff is still 0xffff0000 for 32 bit ints and will be zero extended.
>You probably want ~(bfd_vma)0xffff here.  Alternatively you can use
>
>          value = ((value & 0xffff) ^ 0x8000) - 0x8000.
>