Disassembly of PowerPC mtspr/mfspr instructions

[Ron McCall]

Hi,

I've run into more issues with the disassembly of MPC7455/MPC7457
instructions involving SPRs (special purposes registers) using objdump.
Recall from my previous message that a read of dbat4u was disassembled
as an "mfdc_cst" instruction (MPC860).  Note that reads of dbat4l are
disassembled similarly:

 194:   7d 79 8a a6     mfdc_adr r11 // should be dbat4u

However, writes to dbat4u and dbat4l are disassembled like so:

 1c4:   7d 58 8b a6     mtspr   568,r10 // dbat4u
 1c8:   7d 79 8b a6     mtspr   569,r11 // dbat4l

I had meant to mention in my previous message that if you couldn't just
define new opcodes with the appropriate processor flag(s) then perhaps
using the more generic mfspr/mtspr instructions might be less confusing.

Other SPR issues that I've run across are:

   c:   7d 72 fb a6     mtdbcr0 r11 // should be IABR
  1c:   7d 75 fb a6     mtiac2  r11 // should be DABR

   8:   7c f5 42 a6     mfspr   r7,277 // SPRG5
  40:   7d 35 43 a6     mtsprg5 r9     // writes disassemble OK
 
  14:   7d 36 42 a6     mfspr   r9,278 // SPRG6
  34:   7d 16 43 a6     mtsprg6 r8     // writes disassemble OK

  1c:   7e 90 fa a6     mfdbsr  r20 // should be HID0
  24:   7e 90 fb a6     mtdbsr  r20 // should be HID0

Thus, there is some inconsistency between register reads and writes and
the mapping of SPR numbers to register names for a given architecture.

Does anyone know if there are any easy "fixes" for these "problems"?
Would it be helpful for me to try to generate a complete list of
MPC7455/MPC7457 issues?