[PATCH] m32r-*-as an infinite loop with -m32r2 -O

Kazuhiro Inaoka inaoka.kazuhiro@renesas.com
Thu Jun 9 03:52:00 GMT 2005


Hi Nick,

The following patch must be applied for 2.15 branch too.
Would you commit it into the 2.15-branch?

http://sourceware.org/ml/binutils/2004-04/msg00217.html

Regards,

Kazuhiro Inaoka


Kazuhiro Inaoka wrote:

> Hi Nick,
> 
> This patch is to fix for the following bug.
> 
> Please commit them.
> 
> http://mail.gnu.org/archive/html/bug-binutils/2004-01/msg00033.html
> 
> gas/ChangeLog
> 
> 2004-04-13  Kazuhiro Inaoka <inaoka dot kazuhiro at renesas dot com>
> 
>     * config/tc-m32r.c (md_assemble): Fixed infinite loop bug
>     in parallel.
> 
> gas/testsuite/ChangeLog
> 
> 2004-04-13  Kazuhiro Inaoka <inaoka dot kazuhiro at renesas dot com>
> 
>     * gas/m32r/parallel-2.s, gas/m32r/parallel-2.d: Add a new test
>     case for parallel code.
> 
> Regards,
> Kazuhiro Inaoka
> 
> 
> 
> 
> ------------------------------------------------------------------------
> 
> Index: tc-m32r.c
> ===================================================================
> RCS file: /cvs/src/src/gas/config/tc-m32r.c,v
> retrieving revision 1.35
> diff -c -r1.35 tc-m32r.c
> *** tc-m32r.c	27 Feb 2004 14:13:18 -0000	1.35
> --- tc-m32r.c	13 Apr 2004 06:46:44 -0000
> ***************
> *** 1382,1387 ****
> --- 1382,1395 ----
>   	 prev_insn.insn is NULL when we're on a 32 bit boundary.  */
>         on_32bit_boundary_p = prev_insn.insn == NULL;
>   
> +       /* Change a frag to, if each insn to swap is in a different frag.
> +          It must keep only one instruction in a frag. */
> +       if (parallel() && on_32bit_boundary_p)
> +         {
> +           frag_wane (frag_now);
> +           frag_new (0);
> +         }
> + 
>         /* Look to see if this instruction can be combined with the
>   	 previous instruction to make one, parallel, 32 bit instruction.
>   	 If the previous instruction (potentially) changed the flow of
> ***************
> *** 1442,1454 ****
>   	  else if (insn.frag->fr_opcode == insn.addr)
>   	    insn.frag->fr_opcode = prev_insn.addr;
>   
>   	  /* Update the addresses in any fixups.
>   	     Note that we don't have to handle the case where each insn is in
>   	     a different frag as we ensure they're in the same frag above.  */
> ! 	  for (i = 0; i < prev_insn.num_fixups; ++i)
> ! 	    prev_insn.fixups[i]->fx_where += 2;
> ! 	  for (i = 0; i < insn.num_fixups; ++i)
> ! 	    insn.fixups[i]->fx_where -= 2;
>   	}
>   
>         /* Keep track of whether we've seen a pair of 16 bit insns.
> --- 1450,1474 ----
>   	  else if (insn.frag->fr_opcode == insn.addr)
>   	    insn.frag->fr_opcode = prev_insn.addr;
>   
> +           /* Change a frag to, if each insn is in a different frag.
> + 	     It must keep only one instruction in a frag. */
> +           if (prev_insn.frag != insn.frag)
> +             {
> +               for (i = 0; i < prev_insn.num_fixups; ++i)
> +                 prev_insn.fixups[i]->fx_frag = insn.frag;
> +               for (i = 0; i < insn.num_fixups; ++i)
> +                 insn.fixups[i]->fx_frag = prev_insn.frag;
> +             }
> +           else
>   	  /* Update the addresses in any fixups.
>   	     Note that we don't have to handle the case where each insn is in
>   	     a different frag as we ensure they're in the same frag above.  */
> !             {
> ! 	      for (i = 0; i < prev_insn.num_fixups; ++i)
> ! 	        prev_insn.fixups[i]->fx_where += 2;
> ! 	      for (i = 0; i < insn.num_fixups; ++i)
> ! 	        insn.fixups[i]->fx_where -= 2;
> !             }
>   	}
>   
>         /* Keep track of whether we've seen a pair of 16 bit insns.
> 
> 
> ------------------------------------------------------------------------
> 
> #as: -m32r2 -O
> #objdump: -dr
> 
> .*: +file format .*
> 
> Disassembly of section .text:
> 
> 0+0000 <test>:
>    0:	04 a5 24 46 	add r4,r5 -> st r4,@r6
>    4:	7c ff c6 04 	bc 0 <test> \|\| addi r6,[#]4
> 
> 
> ------------------------------------------------------------------------
> 
> Index: m32r2.exp
> ===================================================================
> RCS file: /cvs/src/src/gas/testsuite/gas/m32r/m32r2.exp,v
> retrieving revision 1.1
> diff -c -r1.1 m32r2.exp
> *** m32r2.exp	3 Dec 2003 17:38:46 -0000	1.1
> --- m32r2.exp	13 Apr 2004 06:34:24 -0000
> ***************
> *** 2,5 ****
> --- 2,6 ----
>   
>   if [istarget m32r*-*-*] {
>       run_dump_test "m32r2"
> +     run_dump_test "parallel-2"
>   }
> 
> 
> ------------------------------------------------------------------------
> 
> 	.text
> test:
>         add r4,r5
>         st r4,@(r6)
>         addi r6,#4
>         .debugsym .LM568
>         bc.s test



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