[PATCH] x86: fix issues with disabled insns in mixed-mode-reloc testcase
Jan Beulich
JBeulich@novell.com
Wed Aug 31 08:38:00 GMT 2005
This fixes the issues that required some of the insns in the recently
added
mixed-mode-reloc testcases to be disabled.
Built and tested on i386-pc-linux-gnu and x86_64-unknown-linux-gnu.
Jan
gas/
2005-08-31 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (reloc): Disable signedness check for 4-byte
relocations in 16- and 32-bit modes.
(i386_displacement): Make pc-relative branch handling dependent
upon operand (rather than address) size.
gas/testsuite/
2005-08-31 Jan Beulich <jbeulich@novell.com>
* gas/i386/mixed-mode-reloc.s: Enable all insns.
* gas/i386/mixed-mode-reloc32.d: Adjust.
* gas/i386/mixed-mode-reloc64.d: Adjust.
---
/home/jbeulich/src/binutils/mainline/2005-08-23/gas/config/tc-i386.c 2005-08-22
14:30:46.000000000 +0200
+++ 2005-08-23/gas/config/tc-i386.c 2005-08-23 16:13:12.000000000
+0200
@@ -1233,6 +1233,11 @@ reloc (unsigned int size,
default:
break;
}
+
+ /* Sign-checking 4-byte relocations in 16-/32-bit code is
pointless. */
+ if (size == 4 && flag_code != CODE_64BIT)
+ sign = -1;
+
reloc = bfd_reloc_type_lookup (stdoutput, other);
if (!reloc)
as_bad (_("unknown relocation (%u)"), other);
@@ -4109,16 +4114,44 @@ i386_displacement (disp_start, disp_end)
segT exp_seg = 0;
char *save_input_line_pointer;
char *gotfree_input_line;
- int bigdisp = Disp32;
+ int bigdisp, override;
unsigned int types = Disp;
+ if ((i.types[this_operand] & JumpAbsolute)
+ || !(current_templates->start->opcode_modifier & (Jump |
JumpDword)))
+ {
+ bigdisp = Disp32;
+ override = (i.prefix[ADDR_PREFIX] != 0);
+ }
+ else
+ {
+ /* For PC-relative branches, the width of the displacement
+ is dependent upon data size, not address size. */
+ bigdisp = 0;
+ override = (i.prefix[DATA_PREFIX] != 0);
+ }
if (flag_code == CODE_64BIT)
{
- if (i.prefix[ADDR_PREFIX] == 0)
+ if (!bigdisp)
+ bigdisp = (override || i.suffix == WORD_MNEM_SUFFIX)
+ ? Disp16
+ : Disp32S | Disp32;
+ else if (!override)
bigdisp = Disp64 | Disp32S | Disp32;
}
- else if ((flag_code == CODE_16BIT) ^ (i.prefix[ADDR_PREFIX] != 0))
- bigdisp = Disp16;
+ else
+ {
+ if (!bigdisp)
+ {
+ if (!override)
+ override = (i.suffix == (flag_code != CODE_16BIT
+ ? WORD_MNEM_SUFFIX
+ : LONG_MNEM_SUFFIX));
+ bigdisp = Disp32;
+ }
+ if ((flag_code == CODE_16BIT) ^ override)
+ bigdisp = Disp16;
+ }
i.types[this_operand] |= bigdisp;
exp = &disp_expressions[i.disp_operands];
---
/home/jbeulich/src/binutils/mainline/2005-08-23/gas/testsuite/gas/i386/mixed-mode-reloc.s 2005-08-22
13:48:13.000000000 +0200
+++
2005-08-23/gas/testsuite/gas/i386/mixed-mode-reloc.s 2005-08-23
15:55:29.000000000 +0200
@@ -2,12 +2,12 @@
.code16
_start16:
-#FIXME movl xtrn@got(%ebx), %eax
-#FIXME calll xtrn@plt
+ movl xtrn@got(%ebx), %eax
+ calll xtrn@plt
.code32
_start32:
-#FIXME movl xtrn@got(%ebx), %eax
+ movl xtrn@got(%ebx), %eax
calll xtrn@plt
.code64
---
/home/jbeulich/src/binutils/mainline/2005-08-23/gas/testsuite/gas/i386/mixed-mode-reloc32.d 2005-08-22
13:48:19.000000000 +0200
+++
2005-08-23/gas/testsuite/gas/i386/mixed-mode-reloc32.d 2005-08-23
15:55:35.000000000 +0200
@@ -6,9 +6,9 @@
RELOCATION RECORDS FOR \[.text\]:
OFFSET[ ]+TYPE[ ]+VALUE[ ]*
-#[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]*
-#[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]*
-#[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]*
+[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]*
+[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]*
+[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]*
---
/home/jbeulich/src/binutils/mainline/2005-08-23/gas/testsuite/gas/i386/mixed-mode-reloc64.d 2005-08-22
13:49:25.000000000 +0200
+++
2005-08-23/gas/testsuite/gas/i386/mixed-mode-reloc64.d 2005-08-23
15:55:41.000000000 +0200
@@ -6,9 +6,9 @@
RELOCATION RECORDS FOR \[.text\]:
OFFSET[ ]+TYPE[ ]+VALUE[ ]*
-#[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
-#[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
-#[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
+[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
+[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
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