[patch] GAS supports for MIPS32 MT ASE
Chao-ying Fu
fu@mips.com
Mon Aug 29 23:23:00 GMT 2005
Ok. I fixed all the issues except the option name
-mt/-mno-mt, because it seems redundant to have two "m"s (-mmt).
Any suggestion?
(I still attach the diff file to avoid the line-wrap problem from my email
program.)
Regards,
Chao-ying
include/opcode/ChangeLog
2005-08-29 Chao-ying Fu <fu@mips.com>
* mips.h (OP_SH_MT_U, OP_MASK_MT_U, OP_SH_MT_H, OP_MASK_MT_H,
OP_SH_MTACC_T, OP_MASK_MTACC_T, OP_SH_MTACC_D, OP_MASK_MTACC_D): New
define.
Document !, $, *, &, g, +t, +T operand formats for MT instructions.
(INSN_ASE_MASK): Update to include INSN_MT.
(INSN_MT): New define for MT ASE.
opcodes/ChangeLog
2005-08-29 Chao-ying Fu <fu@mips.com>
* mips-opc.c (MT32): New define.
(mips_builtin_opcodes): Add MT instructions.
Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the end to avoid opcode
collision with "mftr" and "mttr".
* mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
(print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
formats.
gas/ChangeLog
2005-08-29 Chao-ying Fu <fu@mips.com>
* config/tc-mips.c (mips_set_options): Add ase_mt for MT instructions.
(mips_opts): Add -1 to initialize ase_mt.
(file_ase_mt): New variable for -mt.
(CPU_HAS_MT): New define.
(validate_mips_insn): Add supports for +t, +T, !, $, *, &, g operand
formats.
(mips_ip): Check ase_mt to enable MT instructions.
Handle !, $, *, &, +T, +t, g operand formats.
For "mftc1", "mfthc1", "cftc1", "mttc1", "mtthc1", "cttc1", we allow
odd float registers.
(OPTION_MT, OPTION_NO_MT): New define.
(OPTION_COMPAT_ARCH_BASE): Change because of inserting MT define.
(md_parse_option): Parse OPTION_MT and OPTION_NO_MT.
(mips_after_parse_args): Set ase_mt based on CPU.
(s_mipsset): Handle ".set mt" and ".set nomt".
(mips_elf_final_processing): Remind of adding new flag for MT ASE.
(md_show_usage): Show usage of -mt and -mno-mt.
gas/testsuite/ChangeLog
2005-08-29 Chao-ying Fu <fu@mips.com>
* gas/mips/mips.exp: Run MT test for mips32r2 only.
* gas/mips/mips32-mt.[sdl]: New test.
----- Original Message -----
From: "Maciej W. Rozycki" <macro@linux-mips.org>
To: "Chao-ying Fu" <fu@mips.com>
Cc: "Eric Christopher" <echristo@apple.com>; "Thekkath, Radhika"
<radhika@mips.com>; "Thiemo Seufer" <ths@networkno.de>;
<binutils@sourceware.org>
Sent: Monday, August 29, 2005 2:55 AM
Subject: Re: [patch] GAS supports for MIPS32 MT ASE
> On Fri, 26 Aug 2005, Chao-ying Fu wrote:
>
> > Could you review this patch? We will revise the patch, if there are
issues.
>
> Posting patches inline helps commenting significantly... Cutting &
> pasting for now.
>
> *** 220,229 ****
> {"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s, 0,
> /* b is at the top of the table. */
> /* bal is at the top of the table. */
> - {"bc0f", "p", 0x41000000, 0xffff0000, CBD|RD_CC, 0,
> - {"bc0fl", "p", 0x41020000, 0xffff0000, CBL|RD_CC, 0,
> - {"bc0t", "p", 0x41010000, 0xffff0000, CBD|RD_CC, 0,
> - {"bc0tl", "p", 0x41030000, 0xffff0000, CBL|RD_CC, 0,
> {"bc1any2f", "N,p", 0x45200000, 0xffe30000, CBD|RD_CC|FP_S, 0,
> {"bc1any2t", "N,p", 0x45210000, 0xffe30000, CBD|RD_CC|FP_S, 0,
> {"bc1any4f", "N,p", 0x45400000, 0xffe30000, CBD|RD_CC|FP_S, 0,
> --- 223,228 ----
>
> A comment is missing about the instructions having been relocated (like
> one for "b" and "bal" seen immediately above!).
>
> --- 1351,1415 ----
> {"subu_s.qb", "d,s,t", 0x7c000150, 0xfc0007ff, WR_d|RD_s|RD_t,
> {"wrdsp", "s", 0x7c1ffcf8, 0xfc1fffff, RD_s|DSP_VOLA, 0,
> {"wrdsp", "s,8", 0x7c0004f8, 0xfc1e07ff, RD_s|DSP_VOLA, 0,
> + /* MIPS MT ASE Instructions. */
> + {"dmt", "", 0x41600bc1, 0xffffffff, TRAP,
> + {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0,
> + {"dvpe", "", 0x41600001, 0xffffffff, TRAP,
>
> Note that the table is meant to be sorted alphabetically (except from
> when conflicts arise)...
>
> --- 14359,14367 ----
> -mdsp generate DSP instructions\n\
> -mno-dsp do not generate DSP instructions\n"));
> fprintf (stream, _("\
> + -mt generate MT instructions\n\
> + -mno-mt do not generate MT instructions\n"));
> + fprintf (stream, _("\
> -mfix-vr4120 work around certain VR4120 errata\n\
> -mfix-vr4130 work around VR4130 mflo/mfhi errata\n\
> -mgp32 use 32-bit GPRs, regardless of the chosen
ISA\n\
>
> Hmm, there is an inconsistency here -- I think "-mmt/-mno-mt" sounds
> better than "-mt/-mno-t".
>
> dmt
> dmt $0
> dvpe
> dvpe $1
>
> Testing "dmt" with a non-$0 argument might be a bit more useful to
> assure `objdump' gets the disassembly right for the single-operand
> variation.
>
> I'll leave the rest to the maintainers...
>
> Maciej
>
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