[PATCH] more x86-64 corrections
Jan Beulich
JBeulich@novell.com
Fri Jul 23 12:54:00 GMT 2004
The previously sent patch for x86-64 corrections to the opcode table
wasn't
completely applied for some reason. Additionally, I found two
inconsistencies
with this and the other x86-64 patch that I had sent, and there are
also two
additions that should be done. Finally, intermediately cs and ds
segment
overrides got wrongly re-enabled in 64-bit mode. This patch tries to
address
all of this.
Built and tested on x86_64-unknown-linux-gnu.
Jan
gas:
2004-07-23 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (optimize_imm): Adjust immediates to only
those
permissible for the selected instruction suffix.
(process_suffix): For DefaultSize instructions, suppressing the
guessing of a 'q' suffix if the instruction doesn't support it
is
pointless, because only an 'l' suffix can be guessed in this
place.
include/opcode:
2004-07-23 Jan Beulich <jbeulich@novell.com>
* i386.h: CpuNo64 mov can't reasonably have a q suffix. Moves
to/from
test registers are illegal in 64-bit mode. Add missing NoRex64
to
sidt. cs/ds segment overrides are illegal in 64-bit mode (for
branch
predition hints, the respective mnemonic suffixes should be
used).
fxsave/fxrstor now allow for a 'q' suffix (previously one had
to
explicitly encode a rex64 prefix). Add cmpxchg16b as per
Intel's
64-bit documentation.
diff -N'aurx*.gmo' -xsid
/home/jbeulich/src/binutils/mainline/2004-07-23.08.28/gas/config/tc-i386.c
2004-07-23.08.28-x86_64/gas/config/tc-i386.c
---
/home/jbeulich/src/binutils/mainline/2004-07-23.08.28/gas/config/tc-i386.c 2004-07-22
11:48:34.000000000 +0200
+++ 2004-07-23.08.28-x86_64/gas/config/tc-i386.c 2004-07-23
09:35:22.000000000 +0200
@@ -2258,9 +2258,6 @@
else if ((i.tm.opcode_modifier & DefaultSize) && !i.suffix)
{
i.suffix = stackop_size;
- if (i.suffix == QWORD_MNEM_SUFFIX
- && (i.tm.opcode_modifier & No_qSuf))
- i.suffix = LONG_MNEM_SUFFIX;
}
/* Change the opcode based on the operand size given by i.suffix;
@@ -2547,7 +2544,7 @@
i.types[0] = overlap0;
overlap1 = i.types[1] & i.tm.operand_types[1];
- if ((overlap1 & (Imm8 | Imm8S | Imm16 | Imm32S | Imm32))
+ if ((overlap1 & (Imm8 | Imm8S | Imm16 | Imm32S | Imm32 | Imm64))
&& overlap1 != Imm8 && overlap1 != Imm8S
&& overlap1 != Imm16 && overlap1 != Imm32S
&& overlap1 != Imm32 && overlap1 != Imm64)
diff -N'aurx*.gmo' -xsid
/home/jbeulich/src/binutils/mainline/2004-07-23.08.28/include/opcode/i386.h
2004-07-23.08.28-x86_64/include/opcode/i386.h
---
/home/jbeulich/src/binutils/mainline/2004-07-23.08.28/include/opcode/i386.h 2004-07-23
08:26:33.000000000 +0200
+++ 2004-07-23.08.28-x86_64/include/opcode/i386.h 2004-07-23
12:43:25.703974952 +0200
@@ -85,7 +85,7 @@
#define MOV_AX_DISP32 0xa0
/* In the 64bit mode the short form mov immediate is redefined to
have
64bit displacement value. */
-{ "mov", 2, 0xa0, X, CpuNo64,bwlq_Suf|D|W, {
Disp16|Disp32, Acc, 0 } },
+{ "mov", 2, 0xa0, X, CpuNo64,bwl_Suf|D|W, {
Disp16|Disp32, Acc, 0 } },
{ "mov", 2, 0x88, X, 0, bwlq_Suf|D|W|Modrm, { Reg,
Reg|AnyMem, 0} },
/* In the 64bit mode the short form mov immediate is redefined to
have
64bit displacement value. */
@@ -107,7 +107,7 @@
{ "mov", 2, 0x0f20, X, Cpu64,
q_Suf|D|Modrm|IgnoreSize|NoRex64,{ Control, Reg64|InvMem, 0} },
{ "mov", 2, 0x0f21, X, Cpu386|CpuNo64, l_Suf|D|Modrm|IgnoreSize,{
Debug, Reg32|InvMem, 0} },
{ "mov", 2, 0x0f21, X, Cpu64,
q_Suf|D|Modrm|IgnoreSize|NoRex64,{ Debug, Reg64|InvMem, 0} },
-{ "mov", 2, 0x0f24, X, Cpu386, l_Suf|D|Modrm|IgnoreSize, { Test,
Reg32|InvMem, 0} },
+{ "mov", 2, 0x0f24, X, Cpu386|CpuNo64,
l_Suf|D|Modrm|IgnoreSize, { Test, Reg32|InvMem, 0} },
{ "movabs",2, 0xa0, X, Cpu64, bwlq_Suf|D|W, {
Disp64, Acc, 0 } },
{ "movabs",2, 0xb0, X, Cpu64, q_Suf|W|ShortForm, { Imm64,
Reg64, 0 } },
@@ -576,7 +576,7 @@
{"sgdt", 1, 0x0f01, 0, Cpu286|CpuNo64,
wl_Suf|Modrm, { WordMem, 0, 0} },
{"sgdt", 1, 0x0f01, 0, Cpu64, q_Suf|Modrm|NoRex64, {
LLongMem, 0, 0} },
{"sidt", 1, 0x0f01, 1, Cpu286|CpuNo64,
wl_Suf|Modrm, { WordMem, 0, 0} },
-{"sidt", 1, 0x0f01, 1, Cpu64, q_Suf|Modrm, { LLongMem, 0,
0} },
+{"sidt", 1, 0x0f01, 1, Cpu64, q_Suf|Modrm|NoRex64, {
LLongMem, 0, 0} },
{"sldt", 1, 0x0f00, 0, Cpu286, wlq_Suf|Modrm, {
WordReg|InvMem, 0, 0} },
{"sldt", 1, 0x0f00, 0, Cpu286, w_Suf|Modrm|IgnoreSize,{ ShortMem, 0,
0} },
{"smsw", 1, 0x0f01, 4, Cpu286, wlq_Suf|Modrm, {
WordReg|InvMem, 0, 0} },
@@ -854,9 +854,9 @@
{"lock", 0, 0xf0, X, 0, NoSuf|IsPrefix, { 0, 0, 0} },
{"wait", 0, 0x9b, X, 0, NoSuf|IsPrefix, { 0, 0, 0} },
#define CS_PREFIX_OPCODE 0x2e
-{"cs", 0, 0x2e, X, 0, NoSuf|IsPrefix, { 0, 0, 0} },
+{"cs", 0, 0x2e, X, CpuNo64, NoSuf|IsPrefix, { 0, 0,
0} },
#define DS_PREFIX_OPCODE 0x3e
-{"ds", 0, 0x3e, X, 0, NoSuf|IsPrefix, { 0, 0, 0} },
+{"ds", 0, 0x3e, X, CpuNo64, NoSuf|IsPrefix, { 0, 0,
0} },
#define ES_PREFIX_OPCODE 0x26
{"es", 0, 0x26, X, CpuNo64, NoSuf|IsPrefix, { 0, 0,
0} },
#define FS_PREFIX_OPCODE 0x64
@@ -910,8 +910,8 @@
/* Pentium II/Pentium Pro extensions. */
{"sysenter",0, 0x0f34, X, Cpu686, NoSuf, { 0, 0, 0} },
{"sysexit", 0, 0x0f35, X, Cpu686, NoSuf, { 0, 0, 0} },
-{"fxsave", 1, 0x0fae, 0, Cpu686, FP|Modrm, { LLongMem, 0,
0} },
-{"fxrstor", 1, 0x0fae, 1, Cpu686, FP|Modrm, { LLongMem, 0,
0} },
+{"fxsave", 1, 0x0fae, 0, Cpu686, q_Suf|Modrm, {
LLongMem, 0, 0} },
+{"fxrstor", 1, 0x0fae, 1, Cpu686, q_Suf|Modrm, {
LLongMem, 0, 0} },
{"rdpmc", 0, 0x0f33, X, Cpu686, NoSuf, { 0, 0, 0} },
/* official undefined instr. */
{"ud2", 0, 0x0f0b, X, Cpu686, NoSuf, { 0, 0,
0} },
@@ -1318,6 +1318,7 @@
{"addsubpd", 2, 0x660fd0, X, CpuPNI, FP|Modrm, {
RegXMM|LLongMem, RegXMM, 0 } },
{"addsubps", 2, 0xf20fd0, X, CpuPNI, FP|Modrm, {
RegXMM|LLongMem, RegXMM, 0 } },
+{"cmpxchg16b",1, 0x0fc7, 1, CpuPNI|Cpu64, NoSuf|Modrm|Rex64, {
LLongMem, 0, 0} },
{"fisttp", 1, 0xdf, 1, CpuPNI, sl_FP|FloatMF|Modrm, {
ShortMem|LongMem, 0, 0} },
/* Intel Syntax */
{"fisttpq", 1, 0xdd, 1, CpuPNI, FP|Modrm, { LLongMem, 0,
0} },
>>> Nick Clifton <nickc@redhat.com> 21.07.04 20:27:04 >>>
Hi Jan,
> gas:
> 2004-07-02 Jan Beulich <jbeulich@novell.com>
>
> * config/tc-i386.c: For DefaultSize instructions, don't guess a
> 'q' suffix if the instruction doesn't support it.
> * testsuite/gas/cfi/cfi-x86_64.d: Adjust expectation for leave
> to not have a rex prefix.
> * testsuite/gas/i386/x86-64-inval.[ls]: Add a bunch of
> instructions illegal in 64-bit mode.
>
> include:
> 2004-07-02 Jan Beulich <jbeulich@novell.com>
>
> * opcode/i386.h: Adjust instruction descriptions to better
> match the specification.
Approved and applied.
Cheers
Nick
-------------- next part --------------
A non-text attachment was scrubbed...
Name: binutils-mainline-x86_64.patch
Type: application/octet-stream
Size: 6017 bytes
Desc: not available
URL: <https://sourceware.org/pipermail/binutils/attachments/20040723/3fbf5754/attachment.obj>
More information about the Binutils
mailing list