extracting relocation info from COFF from "section contents" base d on partial_inplace

[Ian Lance Taylor]

"Dave Korn" <dk@artimi.com> writes:

Although this explanation was generally very good, I want to note one
thing.

>   Get it?  The instruction contains a field that is big enough to contain
> the offset (it has to be, since the final result of symbol+offset is going
> to be stored into there), so why not use that field to store the offset in
> the relocatable .o files and save space in the relocation structures?

Many RISC chips can not represent a complete address in a single
instruction, and instead build it using arithmetic operations.  In
that case there may be several fields involved, and the offset may be
too large to fit in any one of them.  While it is true that the offset
can be split up into the different fields, this makes relocation
processing harder, since it is no longer possible to treat each
relocation as a single unit.  The issue gets even tricker when you
want to use part of the address computation as a common subexpression
which is used for two or more actual addresses.

That's why it's often useful to use RELA relocs for RISC chips.  It
wastes space, but it simplifies and speeds up the linker.

Ian