PATCH RFC: Fix ARM bug by splitting up iwmmxt_movsi_insn

[Richard Earnshaw]

> Usage        WSTR<B,H,W,D>{Cond} wRm, <address_mode>
>               WSTRW wCx, <address_mode>
> Qualifiers   B      ­ Store Byte
>              H      ­ Store Half
>              W      ­ Store Word
>              D      ­ Store Double
> 
> So yes, it appears that the wCx registers are differentiated by using the
> cond=0xf encoding and the others have a normal cond field.  Of course
> normally you store the wRx registers anyway.  It would be nice to
> generate predicated wstrw instructions for wRx.

In which case the final alternative should also be removed from the 
predicated variant of iwmmx_movsi_insn.

R.