adding support for a new processor variant

[vikas kesarwani]

Does that mean that i need to define a new ISA for
such an architecture?

-----Original Message-----
Thiemo Seufer wrote:
>vikas kesarwani wrote:
>> Hi,
>> I wish to add support to a new mips variant to have
my assembler and 
>> linker working for it. It is basically similar to
MIPS32 with 2 
>> additional instructions.
>
>Add those two to mips-opc.c.
>
>> For
>> better memory architecture I want to have some
extra
>> sections too.
>
>Should be already possible with the ELF linker.
>
>> The support I want is similar to like
>> giving option as -mcpu=mycpu. I looked into the
binutils2.13.1 code 
>> for mips but could not relate as to where does the
assembler 
>> differentiates between the opcodes for different
cpu.
>
>Look for OPCODE_IS_MEMBER.
>
>
>Thiemo
>

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