ppc: change bitsize of EVUIMM_4 insns

Kumar Gala kumar.gala@motorola.com
Thu Nov 7 16:11:00 GMT 2002


You should also include the EVUIMM_8 case,  It was just properly sized 
from the beginning.  We should make all three EVUIMM_2, EVUIMM_4, 
EVUIMM_8 the same w/respect to this issue since they all shift the 
field.

- kumar

On Thursday, November 7, 2002, at 05:46  PM, Aldy Hernandez wrote:

>> No, make it 32.  32 is used elsewhere to mean "disable the generic
>> check".  OK with that change.
>
> Ok, thanks.
>
> Committing the patch below.
>
> 2002-11-07  Aldy Hernandez  <aldyh@redhat.com>
>
> 	* ppc-opc.c (EVUIMM_4): Change bit size to 32.
> 	(EVUIMM_2): Same.
>
> Index: ppc-opc.c
> ===================================================================
> RCS file: /cvs/src/src/opcodes/ppc-opc.c,v
> retrieving revision 1.40
> diff -c -p -r1.40 ppc-opc.c
> *** ppc-opc.c	7 Nov 2002 00:54:09 -0000	1.40
> --- ppc-opc.c	7 Nov 2002 23:42:21 -0000
> *************** const struct powerpc_operand powerpc_ope
> *** 544,554 ****
>
>     /* The other UIMM field in a half word EVX form instruction. */
>   #define EVUIMM_2 EVUIMM + 1
> !   { 5, 11, insert_ev2, extract_ev2, PPC_OPERAND_PARENS },
>
>     /* The other UIMM field in a word EVX form instruction. */
>   #define EVUIMM_4 EVUIMM_2 + 1
> !   { 5, 11, insert_ev4, extract_ev4, PPC_OPERAND_PARENS },
>
>     /* The other UIMM field in a double EVX form instruction. */
>   #define EVUIMM_8 EVUIMM_4 + 1
> --- 544,554 ----
>
>     /* The other UIMM field in a half word EVX form instruction. */
>   #define EVUIMM_2 EVUIMM + 1
> !   { 32, 11, insert_ev2, extract_ev2, PPC_OPERAND_PARENS },
>
>     /* The other UIMM field in a word EVX form instruction. */
>   #define EVUIMM_4 EVUIMM_2 + 1
> !   { 32, 11, insert_ev4, extract_ev4, PPC_OPERAND_PARENS },
>
>     /* The other UIMM field in a double EVX form instruction. */
>   #define EVUIMM_8 EVUIMM_4 + 1



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