include/dis-asm.h patch for cgen disassemblers

[Frank Ch. Eigler]

Hi -


dje wrote:
> [...]
> Blech.
> [...]
> I'd go with the first possibility, and not overload `mach'.
> Instead of arch/mach in disassemble_info, have arch/mach/mumble
> [...]

OK.  How about this?  It is simpler, but it furthers
disassemble_info field sprawl.


- FChE


Index: opcodes/ChangeLog
===================================================================
@@ -1,3 +1,7 @@
+2002-01-31  Frank Ch. Eigler  <fche@redhat.com>
+
+	* cgen-dis.in (print_insn_@arch@): Support disassemble_info.isas.
+

Index: opcodes/cgen-dis.in
===================================================================
@@ -386,7 +386,7 @@ print_insn_@arch@ (pc, info)
 #ifdef CGEN_COMPUTE_ISA
   isa = CGEN_COMPUTE_ISA (info);
 #else
-  isa = 0;
+  isa = info->isas;
 #endif
 
   /* If we've switched cpu's, close the current table and open a new one.  */

Index: include/ChangeLog
===================================================================
@@ -1,3 +1,8 @@
+2002-01-31  Frank Ch. Eigler  <fche@redhat.com>
+
+	* dis-asm.h (isas): New field in disassemble_info.
+	(INIT_DISASSEMBLE_INFO): Clear it.
+
Index: include/dis-asm.h
===================================================================
@@ -73,6 +73,8 @@ typedef struct disassemble_info {
   unsigned long mach;
   /* Endianness (for bi-endian cpus).  Mono-endian cpus can ignore this.  */
   enum bfd_endian endian;
+  /* A target-specific indication of applicable instruction sets.  */
+  unsigned long isas;
 
   /* Some targets need information about the current section to accurately
      display insns.  If this is NULL, the target disassembler function
@@ -271,6 +273,7 @@ extern int generic_symbol_at_address
   (INFO).flavour = bfd_target_unknown_flavour, \
   (INFO).arch = bfd_arch_unknown, \
   (INFO).mach = 0, \
+  (INFO).isas = 0, \
   (INFO).endian = BFD_ENDIAN_UNKNOWN, \
   (INFO).octets_per_byte = 1, \
   INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)

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