[RFA] Change bfd machine consts to enums.

Michael Snyder msnyder@cygnus.com
Wed Feb 13 20:14:00 GMT 2002


Submitted for your approval: this changes the bfd_mach_* consts
from #defines to enums, to make it easier to debug bfd.

Michael

2002-02-13  Michael Snyder  <msnyder@redhat.com>

	* archures.c: Change bfd_mach_ constants to enums.
	* bfd-in2.h: Regenerate.

Index: archures.c
===================================================================
RCS file: /cvs/src/src/bfd/archures.c,v
retrieving revision 1.45
diff -p -r1.45 archures.c
*** archures.c	2002/02/08 05:33:22	1.45
--- archures.c	2002/02/14 03:10:18
*************** DESCRIPTION
*** 72,154 ****
  .  bfd_arch_unknown,   {* File arch not known.  *}
  .  bfd_arch_obscure,   {* Arch known, not one of these.  *}
  .  bfd_arch_m68k,      {* Motorola 68xxx *}
- .#define bfd_mach_m68000 1
- .#define bfd_mach_m68008 2
- .#define bfd_mach_m68010 3
- .#define bfd_mach_m68020 4
- .#define bfd_mach_m68030 5
- .#define bfd_mach_m68040 6
- .#define bfd_mach_m68060 7
- .#define bfd_mach_cpu32  8
- .#define bfd_mach_mcf5200  9
- .#define bfd_mach_mcf5206e 10
- .#define bfd_mach_mcf5307  11
- .#define bfd_mach_mcf5407  12
  .  bfd_arch_vax,       {* DEC Vax *}
  .  bfd_arch_i960,      {* Intel 960 *}
- .    {* The order of the following is important.
- .       lower number indicates a machine type that
- .       only accepts a subset of the instructions
- .       available to machines with higher numbers.
- .       The exception is the "ca", which is
- .       incompatible with all other machines except
- .       "core".  *}
- .
- .#define bfd_mach_i960_core      1
- .#define bfd_mach_i960_ka_sa     2
- .#define bfd_mach_i960_kb_sb     3
- .#define bfd_mach_i960_mc        4
- .#define bfd_mach_i960_xa        5
- .#define bfd_mach_i960_ca        6
- .#define bfd_mach_i960_jx	 7
- .#define bfd_mach_i960_hx        8
- .
  .  bfd_arch_or32,      {* OpenRISC 32 *}
  .
  .  bfd_arch_a29k,      {* AMD 29000 *}
  .  bfd_arch_sparc,     {* SPARC *}
- .#define bfd_mach_sparc			1
- .{* The difference between v8plus and v9 is that v9 is a true 64 bit env.  *}
- .#define bfd_mach_sparc_sparclet	2
- .#define bfd_mach_sparc_sparclite	3
- .#define bfd_mach_sparc_v8plus		4
- .#define bfd_mach_sparc_v8plusa		5 {* with ultrasparc add'ns.  *}
- .#define bfd_mach_sparc_sparclite_le	6
- .#define bfd_mach_sparc_v9		7
- .#define bfd_mach_sparc_v9a		8 {* with ultrasparc add'ns.  *}
- .#define bfd_mach_sparc_v8plusb		9 {* with cheetah add'ns.  *}
- .#define bfd_mach_sparc_v9b		10 {* with cheetah add'ns.  *}
  .{* Nonzero if MACH has the v9 instruction set.  *}
  .#define bfd_mach_sparc_v9_p(mach) \
  .  ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
  .   && (mach) != bfd_mach_sparc_sparclite_le)
  .  bfd_arch_mips,      {* MIPS Rxxxx *}
- .#define bfd_mach_mips3000		3000
- .#define bfd_mach_mips3900		3900
- .#define bfd_mach_mips4000		4000
- .#define bfd_mach_mips4010		4010
- .#define bfd_mach_mips4100		4100
- .#define bfd_mach_mips4111		4111
- .#define bfd_mach_mips4300		4300
- .#define bfd_mach_mips4400		4400
- .#define bfd_mach_mips4600		4600
- .#define bfd_mach_mips4650		4650
- .#define bfd_mach_mips5000		5000
- .#define bfd_mach_mips6000		6000
- .#define bfd_mach_mips8000		8000
- .#define bfd_mach_mips10000		10000
- .#define bfd_mach_mips12000		12000
- .#define bfd_mach_mips16		16
- .#define bfd_mach_mips5                 5
- .#define bfd_mach_mips_sb1              12310201 {* octal 'SB', 01 *}
- .#define bfd_mach_mipsisa32             32
- .#define bfd_mach_mipsisa64             64
  .  bfd_arch_i386,      {* Intel 386 *}
- .#define bfd_mach_i386_i386 0
- .#define bfd_mach_i386_i8086 1
- .#define bfd_mach_i386_i386_intel_syntax 2
- .#define bfd_mach_x86_64 3
- .#define bfd_mach_x86_64_intel_syntax 4
  .  bfd_arch_we32k,     {* AT&T WE32xxx *}
  .  bfd_arch_tahoe,     {* CCI/Harris Tahoe *}
  .  bfd_arch_i860,      {* Intel 860 *}
--- 72,89 ----
*************** DESCRIPTION
*** 159,272 ****
  .  bfd_arch_m88k,      {* Motorola 88xxx *}
  .  bfd_arch_pyramid,   {* Pyramid Technology *}
  .  bfd_arch_h8300,     {* Hitachi H8/300 *}
- .#define bfd_mach_h8300   1
- .#define bfd_mach_h8300h  2
- .#define bfd_mach_h8300s  3
  .  bfd_arch_pdp11,     {* DEC PDP-11 *}
  .  bfd_arch_powerpc,   {* PowerPC *}
- .#define bfd_mach_ppc		0
- .#define bfd_mach_ppc64		1
- .#define bfd_mach_ppc_403	403
- .#define bfd_mach_ppc_403gc	4030
- .#define bfd_mach_ppc_505	505
- .#define bfd_mach_ppc_601	601
- .#define bfd_mach_ppc_602	602
- .#define bfd_mach_ppc_603	603
- .#define bfd_mach_ppc_ec603e	6031
- .#define bfd_mach_ppc_604	604
- .#define bfd_mach_ppc_620	620
- .#define bfd_mach_ppc_630	630
- .#define bfd_mach_ppc_750	750
- .#define bfd_mach_ppc_860	860
- .#define bfd_mach_ppc_a35	35
- .#define bfd_mach_ppc_rs64ii	642
- .#define bfd_mach_ppc_rs64iii	643
- .#define bfd_mach_ppc_7400	7400
  .  bfd_arch_rs6000,    {* IBM RS/6000 *}
- .#define bfd_mach_rs6k		0
- .#define bfd_mach_rs6k_rs1	6001
- .#define bfd_mach_rs6k_rsc	6003
- .#define bfd_mach_rs6k_rs2	6002
  .  bfd_arch_hppa,      {* HP PA RISC *}
  .  bfd_arch_d10v,      {* Mitsubishi D10V *}
- .#define bfd_mach_d10v		0
- .#define bfd_mach_d10v_ts2	2
- .#define bfd_mach_d10v_ts3	3
  .  bfd_arch_d30v,      {* Mitsubishi D30V *}
  .  bfd_arch_m68hc11,   {* Motorola 68HC11 *}
  .  bfd_arch_m68hc12,   {* Motorola 68HC12 *}
  .  bfd_arch_z8k,       {* Zilog Z8000 *}
- .#define bfd_mach_z8001		1
- .#define bfd_mach_z8002		2
  .  bfd_arch_h8500,     {* Hitachi H8/500 *}
  .  bfd_arch_sh,        {* Hitachi SH *}
- .#define bfd_mach_sh            0
- .#define bfd_mach_sh2        0x20
- .#define bfd_mach_sh_dsp     0x2d
- .#define bfd_mach_sh3        0x30
- .#define bfd_mach_sh3_dsp    0x3d
- .#define bfd_mach_sh3e       0x3e
- .#define bfd_mach_sh4        0x40
- .#define bfd_mach_sh5        0x50
  .  bfd_arch_alpha,     {* Dec Alpha *}
- .#define bfd_mach_alpha_ev4  0x10
- .#define bfd_mach_alpha_ev5  0x20
- .#define bfd_mach_alpha_ev6  0x30
  .  bfd_arch_arm,       {* Advanced Risc Machines ARM.  *}
- .#define bfd_mach_arm_2		1
- .#define bfd_mach_arm_2a	2
- .#define bfd_mach_arm_3		3
- .#define bfd_mach_arm_3M 	4
- .#define bfd_mach_arm_4 	5
- .#define bfd_mach_arm_4T 	6
- .#define bfd_mach_arm_5 	7
- .#define bfd_mach_arm_5T	8
- .#define bfd_mach_arm_5TE	9
- .#define bfd_mach_arm_XScale	10
  .  bfd_arch_ns32k,     {* National Semiconductors ns32000 *}
  .  bfd_arch_w65,       {* WDC 65816 *}
  .  bfd_arch_tic30,     {* Texas Instruments TMS320C30 *}
  .  bfd_arch_tic54x,    {* Texas Instruments TMS320C54X *}
  .  bfd_arch_tic80,     {* TI TMS320c80 (MVP) *}
  .  bfd_arch_v850,      {* NEC V850 *}
- .#define bfd_mach_v850          0
- .#define bfd_mach_v850e 	'E'
- .#define bfd_mach_v850ea	'A'
  .  bfd_arch_arc,       {* ARC Cores *}
- .#define bfd_mach_arc_5         0
- .#define bfd_mach_arc_6         1
- .#define bfd_mach_arc_7         2
- .#define bfd_mach_arc_8         3
  .  bfd_arch_m32r,      {* Mitsubishi M32R/D *}
- .#define bfd_mach_m32r		0 {* For backwards compatibility.  *}
- .#define bfd_mach_m32rx		'x'
  .  bfd_arch_mn10200,   {* Matsushita MN10200 *}
  .  bfd_arch_mn10300,   {* Matsushita MN10300 *}
- .#define bfd_mach_mn10300		300
- .#define bfd_mach_am33		330
  .  bfd_arch_fr30,
- .#define bfd_mach_fr30		0x46523330
  .  bfd_arch_mcore,
  .  bfd_arch_ia64,      {* HP/Intel ia64 *}
- .#define bfd_mach_ia64_elf64	0
- .#define bfd_mach_ia64_elf32	1
  .  bfd_arch_pj,
  .  bfd_arch_avr,       {* Atmel AVR microcontrollers.  *}
- .#define bfd_mach_avr1		1
- .#define bfd_mach_avr2		2
- .#define bfd_mach_avr3		3
- .#define bfd_mach_avr4		4
- .#define bfd_mach_avr5		5
  .  bfd_arch_cris,      {* Axis CRIS *}
  .  bfd_arch_s390,      {* IBM s390 *}
- .#define bfd_mach_s390_esa      0
- .#define bfd_mach_s390_esame    1
  .  bfd_arch_openrisc,  {* OpenRISC *}
  .  bfd_arch_mmix,      {* Donald Knuth's educational processor.  *}
  .  bfd_arch_xstormy16,
- .#define bfd_mach_xstormy16	0
  .  bfd_arch_last
  .  };
  */
  
  /*
--- 94,337 ----
  .  bfd_arch_m88k,      {* Motorola 88xxx *}
  .  bfd_arch_pyramid,   {* Pyramid Technology *}
  .  bfd_arch_h8300,     {* Hitachi H8/300 *}
  .  bfd_arch_pdp11,     {* DEC PDP-11 *}
  .  bfd_arch_powerpc,   {* PowerPC *}
  .  bfd_arch_rs6000,    {* IBM RS/6000 *}
  .  bfd_arch_hppa,      {* HP PA RISC *}
  .  bfd_arch_d10v,      {* Mitsubishi D10V *}
  .  bfd_arch_d30v,      {* Mitsubishi D30V *}
  .  bfd_arch_m68hc11,   {* Motorola 68HC11 *}
  .  bfd_arch_m68hc12,   {* Motorola 68HC12 *}
  .  bfd_arch_z8k,       {* Zilog Z8000 *}
  .  bfd_arch_h8500,     {* Hitachi H8/500 *}
  .  bfd_arch_sh,        {* Hitachi SH *}
  .  bfd_arch_alpha,     {* Dec Alpha *}
  .  bfd_arch_arm,       {* Advanced Risc Machines ARM.  *}
  .  bfd_arch_ns32k,     {* National Semiconductors ns32000 *}
  .  bfd_arch_w65,       {* WDC 65816 *}
  .  bfd_arch_tic30,     {* Texas Instruments TMS320C30 *}
  .  bfd_arch_tic54x,    {* Texas Instruments TMS320C54X *}
  .  bfd_arch_tic80,     {* TI TMS320c80 (MVP) *}
  .  bfd_arch_v850,      {* NEC V850 *}
  .  bfd_arch_arc,       {* ARC Cores *}
  .  bfd_arch_m32r,      {* Mitsubishi M32R/D *}
  .  bfd_arch_mn10200,   {* Matsushita MN10200 *}
  .  bfd_arch_mn10300,   {* Matsushita MN10300 *}
  .  bfd_arch_fr30,
  .  bfd_arch_mcore,
  .  bfd_arch_ia64,      {* HP/Intel ia64 *}
  .  bfd_arch_pj,
  .  bfd_arch_avr,       {* Atmel AVR microcontrollers.  *}
  .  bfd_arch_cris,      {* Axis CRIS *}
  .  bfd_arch_s390,      {* IBM s390 *}
  .  bfd_arch_openrisc,  {* OpenRISC *}
  .  bfd_arch_mmix,      {* Donald Knuth's educational processor.  *}
  .  bfd_arch_xstormy16,
  .  bfd_arch_last
  .  };
+ .enum bfd_mach_m68k
+ .{
+ .  bfd_mach_m68000 = 1,
+ .  bfd_mach_m68008,
+ .  bfd_mach_m68010,
+ .  bfd_mach_m68020,
+ .  bfd_mach_m68030,
+ .  bfd_mach_m68040,
+ .  bfd_mach_m68060,
+ .  bfd_mach_cpu32,
+ .  bfd_mach_mcf5200,
+ .  bfd_mach_mcf5206e,
+ .  bfd_mach_mcf5307,
+ .  bfd_mach_mcf5407
+ .};
+ .    {* The order of the following is important.
+ .       lower number indicates a machine type that
+ .       only accepts a subset of the instructions
+ .       available to machines with higher numbers.
+ .       The exception is the "ca", which is
+ .       incompatible with all other machines except
+ .       "core".  *}
+ .
+ .enum bfd_mach_i960 
+ .{
+ .  bfd_mach_i960_core = 1,
+ .  bfd_mach_i960_ka_sa,
+ .  bfd_mach_i960_kb_sb,
+ .  bfd_mach_i960_mc,
+ .  bfd_mach_i960_xa,
+ .  bfd_mach_i960_ca,
+ .  bfd_mach_i960_jx,
+ .  bfd_mach_i960_hx
+ .};
+ .enum bfd_mach_sparc
+ .{
+ .  bfd_mach_sparc = 1,
+ .{* The difference between v8plus and v9 is that v9 is a true 64 bit env.  *}
+ .  bfd_mach_sparc_sparclet,
+ .  bfd_mach_sparc_sparclite,
+ .  bfd_mach_sparc_v8plus,
+ .  bfd_mach_sparc_v8plusa,	{* with ultrasparc add'ns.  *}
+ .  bfd_mach_sparc_sparclite_le,
+ .  bfd_mach_sparc_v9,
+ .  bfd_mach_sparc_v9a,		{* with ultrasparc add'ns.  *}
+ .  bfd_mach_sparc_v8plusb,	{* with cheetah add'ns.  *}
+ .  bfd_mach_sparc_v9b		{* with cheetah add'ns.  *}
+ .};
+ .enum bfd_mach_mips
+ .{
+ .  bfd_mach_mips3000 = 3000,
+ .  bfd_mach_mips3900 = 3900,
+ .  bfd_mach_mips4000 = 4000,
+ .  bfd_mach_mips4010 = 4010,
+ .  bfd_mach_mips4100 = 4100,
+ .  bfd_mach_mips4111 = 4111,
+ .  bfd_mach_mips4300 = 4300,
+ .  bfd_mach_mips4400 = 4400,
+ .  bfd_mach_mips4600 = 4600,
+ .  bfd_mach_mips4650 = 4650,
+ .  bfd_mach_mips5000 = 5000,
+ .  bfd_mach_mips6000 = 6000,
+ .  bfd_mach_mips8000 = 8000,
+ .  bfd_mach_mips10000 = 10000,
+ .  bfd_mach_mips12000 = 12000,
+ .  bfd_mach_mips16 = 16,
+ .  bfd_mach_mips5 = 5,
+ .  bfd_mach_mips_sb1 = 12310201, {* octal 'SB', 01 *}
+ .  bfd_mach_mipsisa32 = 32,
+ .  bfd_mach_mipsisa64 = 64
+ .};
+ .enum bfd_mach_i386
+ .{
+ .  bfd_mach_i386_i386 = 0,
+ .  bfd_mach_i386_i8086,
+ .  bfd_mach_i386_i386_intel_syntax,
+ .  bfd_mach_x86_64,
+ .  bfd_mach_x86_64_intel_syntax
+ .};
+ .enum bfd_mach_h8300
+ .{
+ .  bfd_mach_h8300 = 1,
+ .  bfd_mach_h8300h,
+ .  bfd_mach_h8300s
+ .};
+ .enum bfd_mach_ppc 
+ .{
+ .  bfd_mach_ppc	= 0,
+ .  bfd_mach_ppc64 = 1,
+ .  bfd_mach_ppc_403 = 403,
+ .  bfd_mach_ppc_403gc = 4030,
+ .  bfd_mach_ppc_505 = 505,
+ .  bfd_mach_ppc_601 = 601,
+ .  bfd_mach_ppc_602 = 602,
+ .  bfd_mach_ppc_603 = 603,
+ .  bfd_mach_ppc_ec603e = 6031,
+ .  bfd_mach_ppc_604 = 604,
+ .  bfd_mach_ppc_620 = 620,
+ .  bfd_mach_ppc_630 = 630,
+ .  bfd_mach_ppc_750 = 750,
+ .  bfd_mach_ppc_860 = 860,
+ .  bfd_mach_ppc_a35 = 35,
+ .  bfd_mach_ppc_rs64ii = 642,
+ .  bfd_mach_ppc_rs64iii = 643,
+ .  bfd_mach_ppc_7400 =7400
+ .};
+ .enum bfd_mach_rs6000
+ .{
+ .  bfd_mach_rs6k = 0,
+ .  bfd_mach_rs6k_rs1 = 6001,
+ .  bfd_mach_rs6k_rsc = 6003,
+ .  bfd_mach_rs6k_rs2 = 6002
+ .};
+ .enum bfd_mach_d10v
+ .{
+ .  bfd_mach_d10v = 0,
+ .  bfd_mach_d10v_ts2 = 2,
+ .  bfd_mach_d10v_ts3 = 3
+ .};
+ .enum bfd_mach_z8k
+ .{
+ .  bfd_mach_z8001 = 1,
+ .  bfd_mach_z8002
+ .};
+ .enum bfd_mach_sh
+ .{
+ .  bfd_mach_sh = 0,
+ .  bfd_mach_sh2 = 0x20,
+ .  bfd_mach_sh_dsp = 0x2d,
+ .  bfd_mach_sh3 = 0x30,
+ .  bfd_mach_sh3_dsp = 0x3d,
+ .  bfd_mach_sh3e = 0x3e,
+ .  bfd_mach_sh4 = 0x40,
+ .  bfd_mach_sh5 = 0x50
+ .};
+ .enum bfd_mach_alpha
+ .{
+ .  bfd_mach_alpha_ev4 = 0x10,
+ .  bfd_mach_alpha_ev5 = 0x20,
+ .  bfd_mach_alpha_ev6 = 0x30
+ .};
+ .enum bfd_mach_arm
+ .{
+ .  bfd_mach_arm_2 = 1,
+ .  bfd_mach_arm_2a,
+ .  bfd_mach_arm_3,
+ .  bfd_mach_arm_3M,
+ .  bfd_mach_arm_4,
+ .  bfd_mach_arm_4T,
+ .  bfd_mach_arm_5,
+ .  bfd_mach_arm_5T,
+ .  bfd_mach_arm_5TE,
+ .  bfd_mach_arm_XScale
+ .};
+ .enum bfd_mach_v850
+ .{
+ .  bfd_mach_v850 = 0,
+ .  bfd_mach_v850e = 'E',
+ .  bfd_mach_v850ea = 'A'
+ .};
+ .enum bfd_mach_arc
+ .{
+ .  bfd_mach_arc_5 = 0,
+ .  bfd_mach_arc_6,
+ .  bfd_mach_arc_7,
+ .  bfd_mach_arc_8
+ .};
+ .enum bfd_mach_m32r
+ .{
+ .  bfd_mach_m32r = 0,	{* For backwards compatibility.  *}
+ .  bfd_mach_m32rx = 'x'
+ .};
+ .enum bfd_mach_mn10300
+ .{
+ .  bfd_mach_mn10300 = 300,
+ .  bfd_mach_am33 = 330
+ .};
+ .enum bfd_mach_fr30
+ .{
+ .  bfd_mach_fr30 = 0x46523330
+ .};
+ .enum bfd_mach_ia64
+ .{
+ .  bfd_mach_ia64_elf64 = 0,
+ .  bfd_mach_ia64_elf32
+ .};
+ .enum bfd_mach_avr
+ .{
+ .  bfd_mach_avr1 = 1,
+ .  bfd_mach_avr2,
+ .  bfd_mach_avr3,
+ .  bfd_mach_avr4,
+ .  bfd_mach_avr5
+ .};
+ .enum bfd_mach_s390
+ .{
+ .  bfd_mach_s390_esa = 0,
+ .  bfd_mach_s390_esame
+ .};
+ .enum bfd_mach_xstormy16
+ .{
+ .  bfd_mach_xstormy16 = 0
+ .};
  */
  
  /*
Index: bfd-in2.h
===================================================================
RCS file: /cvs/src/src/bfd/bfd-in2.h,v
retrieving revision 1.145
diff -p -r1.145 bfd-in2.h
*** bfd-in2.h	2002/02/09 22:53:53	1.145
--- bfd-in2.h	2002/02/14 03:10:19
*************** enum bfd_architecture
*** 1451,1533 ****
    bfd_arch_unknown,   /* File arch not known.  */
    bfd_arch_obscure,   /* Arch known, not one of these.  */
    bfd_arch_m68k,      /* Motorola 68xxx */
- #define bfd_mach_m68000 1
- #define bfd_mach_m68008 2
- #define bfd_mach_m68010 3
- #define bfd_mach_m68020 4
- #define bfd_mach_m68030 5
- #define bfd_mach_m68040 6
- #define bfd_mach_m68060 7
- #define bfd_mach_cpu32  8
- #define bfd_mach_mcf5200  9
- #define bfd_mach_mcf5206e 10
- #define bfd_mach_mcf5307  11
- #define bfd_mach_mcf5407  12
    bfd_arch_vax,       /* DEC Vax */
    bfd_arch_i960,      /* Intel 960 */
-     /* The order of the following is important.
-        lower number indicates a machine type that
-        only accepts a subset of the instructions
-        available to machines with higher numbers.
-        The exception is the "ca", which is
-        incompatible with all other machines except
-        "core".  */
- 
- #define bfd_mach_i960_core      1
- #define bfd_mach_i960_ka_sa     2
- #define bfd_mach_i960_kb_sb     3
- #define bfd_mach_i960_mc        4
- #define bfd_mach_i960_xa        5
- #define bfd_mach_i960_ca        6
- #define bfd_mach_i960_jx        7
- #define bfd_mach_i960_hx        8
- 
    bfd_arch_or32,      /* OpenRISC 32 */
  
    bfd_arch_a29k,      /* AMD 29000 */
    bfd_arch_sparc,     /* SPARC */
- #define bfd_mach_sparc                 1
- /* The difference between v8plus and v9 is that v9 is a true 64 bit env.  */
- #define bfd_mach_sparc_sparclet        2
- #define bfd_mach_sparc_sparclite       3
- #define bfd_mach_sparc_v8plus          4
- #define bfd_mach_sparc_v8plusa         5 /* with ultrasparc add'ns.  */
- #define bfd_mach_sparc_sparclite_le    6
- #define bfd_mach_sparc_v9              7
- #define bfd_mach_sparc_v9a             8 /* with ultrasparc add'ns.  */
- #define bfd_mach_sparc_v8plusb         9 /* with cheetah add'ns.  */
- #define bfd_mach_sparc_v9b             10 /* with cheetah add'ns.  */
  /* Nonzero if MACH has the v9 instruction set.  */
  #define bfd_mach_sparc_v9_p(mach) \
    ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
     && (mach) != bfd_mach_sparc_sparclite_le)
    bfd_arch_mips,      /* MIPS Rxxxx */
- #define bfd_mach_mips3000              3000
- #define bfd_mach_mips3900              3900
- #define bfd_mach_mips4000              4000
- #define bfd_mach_mips4010              4010
- #define bfd_mach_mips4100              4100
- #define bfd_mach_mips4111              4111
- #define bfd_mach_mips4300              4300
- #define bfd_mach_mips4400              4400
- #define bfd_mach_mips4600              4600
- #define bfd_mach_mips4650              4650
- #define bfd_mach_mips5000              5000
- #define bfd_mach_mips6000              6000
- #define bfd_mach_mips8000              8000
- #define bfd_mach_mips10000             10000
- #define bfd_mach_mips12000             12000
- #define bfd_mach_mips16                16
- #define bfd_mach_mips5                 5
- #define bfd_mach_mips_sb1              12310201 /* octal 'SB', 01 */
- #define bfd_mach_mipsisa32             32
- #define bfd_mach_mipsisa64             64
    bfd_arch_i386,      /* Intel 386 */
- #define bfd_mach_i386_i386 0
- #define bfd_mach_i386_i8086 1
- #define bfd_mach_i386_i386_intel_syntax 2
- #define bfd_mach_x86_64 3
- #define bfd_mach_x86_64_intel_syntax 4
    bfd_arch_we32k,     /* AT&T WE32xxx */
    bfd_arch_tahoe,     /* CCI/Harris Tahoe */
    bfd_arch_i860,      /* Intel 860 */
--- 1451,1468 ----
*************** enum bfd_architecture
*** 1538,1651 ****
    bfd_arch_m88k,      /* Motorola 88xxx */
    bfd_arch_pyramid,   /* Pyramid Technology */
    bfd_arch_h8300,     /* Hitachi H8/300 */
- #define bfd_mach_h8300   1
- #define bfd_mach_h8300h  2
- #define bfd_mach_h8300s  3
    bfd_arch_pdp11,     /* DEC PDP-11 */
    bfd_arch_powerpc,   /* PowerPC */
- #define bfd_mach_ppc           0
- #define bfd_mach_ppc64         1
- #define bfd_mach_ppc_403       403
- #define bfd_mach_ppc_403gc     4030
- #define bfd_mach_ppc_505       505
- #define bfd_mach_ppc_601       601
- #define bfd_mach_ppc_602       602
- #define bfd_mach_ppc_603       603
- #define bfd_mach_ppc_ec603e    6031
- #define bfd_mach_ppc_604       604
- #define bfd_mach_ppc_620       620
- #define bfd_mach_ppc_630       630
- #define bfd_mach_ppc_750       750
- #define bfd_mach_ppc_860       860
- #define bfd_mach_ppc_a35       35
- #define bfd_mach_ppc_rs64ii    642
- #define bfd_mach_ppc_rs64iii   643
- #define bfd_mach_ppc_7400      7400
    bfd_arch_rs6000,    /* IBM RS/6000 */
- #define bfd_mach_rs6k          0
- #define bfd_mach_rs6k_rs1      6001
- #define bfd_mach_rs6k_rsc      6003
- #define bfd_mach_rs6k_rs2      6002
    bfd_arch_hppa,      /* HP PA RISC */
    bfd_arch_d10v,      /* Mitsubishi D10V */
- #define bfd_mach_d10v          0
- #define bfd_mach_d10v_ts2      2
- #define bfd_mach_d10v_ts3      3
    bfd_arch_d30v,      /* Mitsubishi D30V */
    bfd_arch_m68hc11,   /* Motorola 68HC11 */
    bfd_arch_m68hc12,   /* Motorola 68HC12 */
    bfd_arch_z8k,       /* Zilog Z8000 */
- #define bfd_mach_z8001         1
- #define bfd_mach_z8002         2
    bfd_arch_h8500,     /* Hitachi H8/500 */
    bfd_arch_sh,        /* Hitachi SH */
- #define bfd_mach_sh            0
- #define bfd_mach_sh2        0x20
- #define bfd_mach_sh_dsp     0x2d
- #define bfd_mach_sh3        0x30
- #define bfd_mach_sh3_dsp    0x3d
- #define bfd_mach_sh3e       0x3e
- #define bfd_mach_sh4        0x40
- #define bfd_mach_sh5        0x50
    bfd_arch_alpha,     /* Dec Alpha */
- #define bfd_mach_alpha_ev4  0x10
- #define bfd_mach_alpha_ev5  0x20
- #define bfd_mach_alpha_ev6  0x30
    bfd_arch_arm,       /* Advanced Risc Machines ARM.  */
- #define bfd_mach_arm_2         1
- #define bfd_mach_arm_2a        2
- #define bfd_mach_arm_3         3
- #define bfd_mach_arm_3M        4
- #define bfd_mach_arm_4         5
- #define bfd_mach_arm_4T        6
- #define bfd_mach_arm_5         7
- #define bfd_mach_arm_5T        8
- #define bfd_mach_arm_5TE       9
- #define bfd_mach_arm_XScale    10
    bfd_arch_ns32k,     /* National Semiconductors ns32000 */
    bfd_arch_w65,       /* WDC 65816 */
    bfd_arch_tic30,     /* Texas Instruments TMS320C30 */
    bfd_arch_tic54x,    /* Texas Instruments TMS320C54X */
    bfd_arch_tic80,     /* TI TMS320c80 (MVP) */
    bfd_arch_v850,      /* NEC V850 */
- #define bfd_mach_v850          0
- #define bfd_mach_v850e         'E'
- #define bfd_mach_v850ea        'A'
    bfd_arch_arc,       /* ARC Cores */
- #define bfd_mach_arc_5         0
- #define bfd_mach_arc_6         1
- #define bfd_mach_arc_7         2
- #define bfd_mach_arc_8         3
    bfd_arch_m32r,      /* Mitsubishi M32R/D */
- #define bfd_mach_m32r          0 /* For backwards compatibility.  */
- #define bfd_mach_m32rx         'x'
    bfd_arch_mn10200,   /* Matsushita MN10200 */
    bfd_arch_mn10300,   /* Matsushita MN10300 */
- #define bfd_mach_mn10300               300
- #define bfd_mach_am33          330
    bfd_arch_fr30,
- #define bfd_mach_fr30          0x46523330
    bfd_arch_mcore,
    bfd_arch_ia64,      /* HP/Intel ia64 */
- #define bfd_mach_ia64_elf64    0
- #define bfd_mach_ia64_elf32    1
    bfd_arch_pj,
    bfd_arch_avr,       /* Atmel AVR microcontrollers.  */
- #define bfd_mach_avr1          1
- #define bfd_mach_avr2          2
- #define bfd_mach_avr3          3
- #define bfd_mach_avr4          4
- #define bfd_mach_avr5          5
    bfd_arch_cris,      /* Axis CRIS */
    bfd_arch_s390,      /* IBM s390 */
- #define bfd_mach_s390_esa      0
- #define bfd_mach_s390_esame    1
    bfd_arch_openrisc,  /* OpenRISC */
    bfd_arch_mmix,      /* Donald Knuth's educational processor.  */
    bfd_arch_xstormy16,
- #define bfd_mach_xstormy16     0
    bfd_arch_last
    };
  
  typedef struct bfd_arch_info
  {
--- 1473,1716 ----
    bfd_arch_m88k,      /* Motorola 88xxx */
    bfd_arch_pyramid,   /* Pyramid Technology */
    bfd_arch_h8300,     /* Hitachi H8/300 */
    bfd_arch_pdp11,     /* DEC PDP-11 */
    bfd_arch_powerpc,   /* PowerPC */
    bfd_arch_rs6000,    /* IBM RS/6000 */
    bfd_arch_hppa,      /* HP PA RISC */
    bfd_arch_d10v,      /* Mitsubishi D10V */
    bfd_arch_d30v,      /* Mitsubishi D30V */
    bfd_arch_m68hc11,   /* Motorola 68HC11 */
    bfd_arch_m68hc12,   /* Motorola 68HC12 */
    bfd_arch_z8k,       /* Zilog Z8000 */
    bfd_arch_h8500,     /* Hitachi H8/500 */
    bfd_arch_sh,        /* Hitachi SH */
    bfd_arch_alpha,     /* Dec Alpha */
    bfd_arch_arm,       /* Advanced Risc Machines ARM.  */
    bfd_arch_ns32k,     /* National Semiconductors ns32000 */
    bfd_arch_w65,       /* WDC 65816 */
    bfd_arch_tic30,     /* Texas Instruments TMS320C30 */
    bfd_arch_tic54x,    /* Texas Instruments TMS320C54X */
    bfd_arch_tic80,     /* TI TMS320c80 (MVP) */
    bfd_arch_v850,      /* NEC V850 */
    bfd_arch_arc,       /* ARC Cores */
    bfd_arch_m32r,      /* Mitsubishi M32R/D */
    bfd_arch_mn10200,   /* Matsushita MN10200 */
    bfd_arch_mn10300,   /* Matsushita MN10300 */
    bfd_arch_fr30,
    bfd_arch_mcore,
    bfd_arch_ia64,      /* HP/Intel ia64 */
    bfd_arch_pj,
    bfd_arch_avr,       /* Atmel AVR microcontrollers.  */
    bfd_arch_cris,      /* Axis CRIS */
    bfd_arch_s390,      /* IBM s390 */
    bfd_arch_openrisc,  /* OpenRISC */
    bfd_arch_mmix,      /* Donald Knuth's educational processor.  */
    bfd_arch_xstormy16,
    bfd_arch_last
    };
+ enum bfd_mach_m68k
+ {
+   bfd_mach_m68000 = 1,
+   bfd_mach_m68008,
+   bfd_mach_m68010,
+   bfd_mach_m68020,
+   bfd_mach_m68030,
+   bfd_mach_m68040,
+   bfd_mach_m68060,
+   bfd_mach_cpu32,
+   bfd_mach_mcf5200,
+   bfd_mach_mcf5206e,
+   bfd_mach_mcf5307,
+   bfd_mach_mcf5407
+ };
+     /* The order of the following is important.
+        lower number indicates a machine type that
+        only accepts a subset of the instructions
+        available to machines with higher numbers.
+        The exception is the "ca", which is
+        incompatible with all other machines except
+        "core".  */
+ 
+ enum bfd_mach_i960 
+ {
+   bfd_mach_i960_core = 1,
+   bfd_mach_i960_ka_sa,
+   bfd_mach_i960_kb_sb,
+   bfd_mach_i960_mc,
+   bfd_mach_i960_xa,
+   bfd_mach_i960_ca,
+   bfd_mach_i960_jx,
+   bfd_mach_i960_hx
+ };
+ enum bfd_mach_sparc
+ {
+   bfd_mach_sparc = 1,
+ /* The difference between v8plus and v9 is that v9 is a true 64 bit env.  */
+   bfd_mach_sparc_sparclet,
+   bfd_mach_sparc_sparclite,
+   bfd_mach_sparc_v8plus,
+   bfd_mach_sparc_v8plusa,      /* with ultrasparc add'ns.  */
+   bfd_mach_sparc_sparclite_le,
+   bfd_mach_sparc_v9,
+   bfd_mach_sparc_v9a,          /* with ultrasparc add'ns.  */
+   bfd_mach_sparc_v8plusb,      /* with cheetah add'ns.  */
+   bfd_mach_sparc_v9b           /* with cheetah add'ns.  */
+ };
+ enum bfd_mach_mips
+ {
+   bfd_mach_mips3000 = 3000,
+   bfd_mach_mips3900 = 3900,
+   bfd_mach_mips4000 = 4000,
+   bfd_mach_mips4010 = 4010,
+   bfd_mach_mips4100 = 4100,
+   bfd_mach_mips4111 = 4111,
+   bfd_mach_mips4300 = 4300,
+   bfd_mach_mips4400 = 4400,
+   bfd_mach_mips4600 = 4600,
+   bfd_mach_mips4650 = 4650,
+   bfd_mach_mips5000 = 5000,
+   bfd_mach_mips6000 = 6000,
+   bfd_mach_mips8000 = 8000,
+   bfd_mach_mips10000 = 10000,
+   bfd_mach_mips12000 = 12000,
+   bfd_mach_mips16 = 16,
+   bfd_mach_mips5 = 5,
+   bfd_mach_mips_sb1 = 12310201, /* octal 'SB', 01 */
+   bfd_mach_mipsisa32 = 32,
+   bfd_mach_mipsisa64 = 64
+ };
+ enum bfd_mach_i386
+ {
+   bfd_mach_i386_i386 = 0,
+   bfd_mach_i386_i8086,
+   bfd_mach_i386_i386_intel_syntax,
+   bfd_mach_x86_64,
+   bfd_mach_x86_64_intel_syntax
+ };
+ enum bfd_mach_h8300
+ {
+   bfd_mach_h8300 = 1,
+   bfd_mach_h8300h,
+   bfd_mach_h8300s
+ };
+ enum bfd_mach_ppc 
+ {
+   bfd_mach_ppc = 0,
+   bfd_mach_ppc64 = 1,
+   bfd_mach_ppc_403 = 403,
+   bfd_mach_ppc_403gc = 4030,
+   bfd_mach_ppc_505 = 505,
+   bfd_mach_ppc_601 = 601,
+   bfd_mach_ppc_602 = 602,
+   bfd_mach_ppc_603 = 603,
+   bfd_mach_ppc_ec603e = 6031,
+   bfd_mach_ppc_604 = 604,
+   bfd_mach_ppc_620 = 620,
+   bfd_mach_ppc_630 = 630,
+   bfd_mach_ppc_750 = 750,
+   bfd_mach_ppc_860 = 860,
+   bfd_mach_ppc_a35 = 35,
+   bfd_mach_ppc_rs64ii = 642,
+   bfd_mach_ppc_rs64iii = 643,
+   bfd_mach_ppc_7400 =7400
+ };
+ enum bfd_mach_rs6000
+ {
+   bfd_mach_rs6k = 0,
+   bfd_mach_rs6k_rs1 = 6001,
+   bfd_mach_rs6k_rsc = 6003,
+   bfd_mach_rs6k_rs2 = 6002
+ };
+ enum bfd_mach_d10v
+ {
+   bfd_mach_d10v = 0,
+   bfd_mach_d10v_ts2 = 2,
+   bfd_mach_d10v_ts3 = 3
+ };
+ enum bfd_mach_z8k
+ {
+   bfd_mach_z8001 = 1,
+   bfd_mach_z8002
+ };
+ enum bfd_mach_sh
+ {
+   bfd_mach_sh = 0,
+   bfd_mach_sh2 = 0x20,
+   bfd_mach_sh_dsp = 0x2d,
+   bfd_mach_sh3 = 0x30,
+   bfd_mach_sh3_dsp = 0x3d,
+   bfd_mach_sh3e = 0x3e,
+   bfd_mach_sh4 = 0x40,
+   bfd_mach_sh5 = 0x50
+ };
+ enum bfd_mach_alpha
+ {
+   bfd_mach_alpha_ev4 = 0x10,
+   bfd_mach_alpha_ev5 = 0x20,
+   bfd_mach_alpha_ev6 = 0x30
+ };
+ enum bfd_mach_arm
+ {
+   bfd_mach_arm_2 = 1,
+   bfd_mach_arm_2a,
+   bfd_mach_arm_3,
+   bfd_mach_arm_3M,
+   bfd_mach_arm_4,
+   bfd_mach_arm_4T,
+   bfd_mach_arm_5,
+   bfd_mach_arm_5T,
+   bfd_mach_arm_5TE,
+   bfd_mach_arm_XScale
+ };
+ enum bfd_mach_v850
+ {
+   bfd_mach_v850 = 0,
+   bfd_mach_v850e = 'E',
+   bfd_mach_v850ea = 'A'
+ };
+ enum bfd_mach_arc
+ {
+   bfd_mach_arc_5 = 0,
+   bfd_mach_arc_6,
+   bfd_mach_arc_7,
+   bfd_mach_arc_8
+ };
+ enum bfd_mach_m32r
+ {
+   bfd_mach_m32r = 0,   /* For backwards compatibility.  */
+   bfd_mach_m32rx = 'x'
+ };
+ enum bfd_mach_mn10300
+ {
+   bfd_mach_mn10300 = 300,
+   bfd_mach_am33 = 330
+ };
+ enum bfd_mach_fr30
+ {
+   bfd_mach_fr30 = 0x46523330
+ };
+ enum bfd_mach_ia64
+ {
+   bfd_mach_ia64_elf64 = 0,
+   bfd_mach_ia64_elf32
+ };
+ enum bfd_mach_avr
+ {
+   bfd_mach_avr1 = 1,
+   bfd_mach_avr2,
+   bfd_mach_avr3,
+   bfd_mach_avr4,
+   bfd_mach_avr5
+ };
+ enum bfd_mach_s390
+ {
+   bfd_mach_s390_esa = 0,
+   bfd_mach_s390_esame
+ };
+ enum bfd_mach_xstormy16
+ {
+   bfd_mach_xstormy16 = 0
+ };
  
  typedef struct bfd_arch_info
  {



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