[ia64] add ld8.mov
Richard Henderson
rth@redhat.com
Tue Dec 3 10:14:00 GMT 2002
This is not so much a new instruction but a relocation attached to an
ld8 insn that allows it to be relaxed to a mov insn by the linker.
I plan on adding the associated ltoff22x and linker relaxation code soon.
r~
include/opcode/
* ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
bfd/
* cpu-ia64-opc.c (elf64_ia64_operands): Add ldxmov entry.
opcodes/
* ia64-opc-m.c: Add ld8.mov.
* ia64-asmtab.c: Regenerate.
gas/
* config/tc-ia64.c (operand_match): Add IA64_OPND_LDXMOV case.
gas/testsuite/
* gas/ia64/ldxmov-1.[ds]: New.
* gas/ia64/ldxmov-2.[ls]: New.
* gas/ia64/ia64.exp: Run them.
Index: bfd/cpu-ia64-opc.c
===================================================================
RCS file: /cvs/src/src/bfd/cpu-ia64-opc.c,v
retrieving revision 1.6
diff -u -p -u -r1.6 cpu-ia64-opc.c
--- bfd/cpu-ia64-opc.c 18 Sep 2001 09:57:22 -0000 1.6
+++ bfd/cpu-ia64-opc.c 3 Dec 2002 17:58:17 -0000
@@ -586,4 +586,7 @@ const struct ia64_operand elf64_ia64_ope
"a branch target" },
{ REL, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* TGT64 */
"a branch target" },
+
+ { ABS, ins_const, ext_const, 0, {{0, 0}}, 0, /* LDXMOV */
+ "ldxmov target" },
};
Index: gas/config/tc-ia64.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-ia64.c,v
retrieving revision 1.73
diff -u -p -u -r1.73 tc-ia64.c
--- gas/config/tc-ia64.c 28 Nov 2002 23:32:59 -0000 1.73
+++ gas/config/tc-ia64.c 3 Dec 2002 17:58:24 -0000
@@ -5523,6 +5523,15 @@ operand_match (idesc, index, e)
}
break;
+ case IA64_OPND_LDXMOV:
+ fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
+ fix->code = BFD_RELOC_IA64_LDXMOV;
+ fix->opnd = idesc->operands[index];
+ fix->expr = *e;
+ fix->is_pcrel = 0;
+ ++CURR_SLOT.num_fixups;
+ return OPERAND_MATCH;
+
default:
break;
}
Index: gas/testsuite/gas/ia64/ia64.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/ia64/ia64.exp,v
retrieving revision 1.2
diff -u -p -u -r1.2 ia64.exp
--- gas/testsuite/gas/ia64/ia64.exp 23 May 2002 13:12:51 -0000 1.2
+++ gas/testsuite/gas/ia64/ia64.exp 3 Dec 2002 17:58:26 -0000
@@ -36,4 +36,6 @@ if [istarget "ia64-*"] then {
run_dump_test "dv-safe"
run_dump_test "dv-srlz"
run_dump_test "tls"
+ run_dump_test "ldxmov-1"
+ run_list_test "ldxmov-2" ""
}
Index: gas/testsuite/gas/ia64/ldxmov-1.d
===================================================================
RCS file: gas/testsuite/gas/ia64/ldxmov-1.d
diff -N gas/testsuite/gas/ia64/ldxmov-1.d
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/ia64/ldxmov-1.d 3 Dec 2002 17:58:26 -0000
@@ -0,0 +1,18 @@
+#objdump: -dr
+#name: ia64 ldxmov-1
+
+.*: file format elf64-ia64-little
+
+Disassembly of section \.text:
+
+0*0000000 <\.text>:
+ 0: 18 10 00 06 18 10 \[MMB\] ld8 r2=\[r3\]
+ 0: LDXMOV foo
+ 1: LDXMOV \.data
+ 6: 40 00 14 30 20 00 ld8 r4=\[r5\]
+ c: 00 00 00 20 nop\.b 0x0
+ 10: 19 30 00 0e 18 10 \[MMB\] ld8 r6=\[r7\]
+ 10: LDXMOV foo\+0x64
+ 11: LDXMOV \.data\+0x64
+ 16: 80 00 24 30 20 00 ld8 r8=\[r9\]
+ 1c: 00 00 00 20 nop.b 0x0;;
Index: gas/testsuite/gas/ia64/ldxmov-1.s
===================================================================
RCS file: gas/testsuite/gas/ia64/ldxmov-1.s
diff -N gas/testsuite/gas/ia64/ldxmov-1.s
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/ia64/ldxmov-1.s 3 Dec 2002 17:58:26 -0000
@@ -0,0 +1,8 @@
+ .text
+ ld8.mov r2 = [r3], foo#
+ ld8.mov r4 = [r5], bar#
+ ld8.mov r6 = [r7], foo# + 100
+ ld8.mov r8 = [r9], bar# + 100
+
+ .data
+bar:
Index: gas/testsuite/gas/ia64/ldxmov-2.l
===================================================================
RCS file: gas/testsuite/gas/ia64/ldxmov-2.l
diff -N gas/testsuite/gas/ia64/ldxmov-2.l
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/ia64/ldxmov-2.l 3 Dec 2002 17:58:26 -0000
@@ -0,0 +1,5 @@
+.*: Assembler messages:
+.*:5: Warning: Use of 'ld8.mov' violates RAW dependency .*number is 2
+.*:4: Warning: This is the location of the conflicting usage
+.*:8: Warning: Use of 'mov' violates RAW dependency .*number is 2
+.*:7: Warning: This is the location of the conflicting usage
Index: gas/testsuite/gas/ia64/ldxmov-2.s
===================================================================
RCS file: gas/testsuite/gas/ia64/ldxmov-2.s
diff -N gas/testsuite/gas/ia64/ldxmov-2.s
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/ia64/ldxmov-2.s 3 Dec 2002 17:58:26 -0000
@@ -0,0 +1,8 @@
+ .text
+ .explicit
+
+ mov r2 = r0
+ ld8.mov r3 = [r2], foo#
+ ;;
+ ld8.mov r2 = [r0], foo#
+ mov r3 = r2
Index: include/opcode/ia64.h
===================================================================
RCS file: /cvs/src/src/include/opcode/ia64.h,v
retrieving revision 1.4
diff -u -p -u -r1.4 ia64.h
--- include/opcode/ia64.h 25 May 2002 12:53:48 -0000 1.4
+++ include/opcode/ia64.h 3 Dec 2002 17:58:31 -0000
@@ -133,6 +133,7 @@ enum ia64_opnd
IA64_OPND_TGT25b, /* signed 25-bit (ip + 16*bits 6-12, 20-32, 36) */
IA64_OPND_TGT25c, /* signed 25-bit (ip + 16*bits 13-32, 36) */
IA64_OPND_TGT64, /* 64-bit (ip + 16*bits 13-32, 36, 2-40(L)) */
+ IA64_OPND_LDXMOV, /* any symbol, generates R_IA64_LDXMOV. */
IA64_OPND_COUNT /* # of operand types (MUST BE LAST!) */
};
Index: opcodes/ia64-asmtab.c
Index: opcodes/ia64-opc-m.c
===================================================================
RCS file: /cvs/src/src/opcodes/ia64-opc-m.c,v
retrieving revision 1.4
diff -u -p -u -r1.4 ia64-opc-m.c
--- opcodes/ia64-opc-m.c 7 Nov 2002 14:33:48 -0000 1.4
+++ opcodes/ia64-opc-m.c 3 Dec 2002 17:58:36 -0000
@@ -265,6 +265,10 @@ struct ia64_opcode ia64_opcodes_m[] =
{"ld8.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x2b, 1), {R1, MR3}, EMPTY},
{"ld8.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x2b, 3), {R1, MR3}, EMPTY},
+ /* Pseudo-op that generates ldxmov relocation. */
+ {"ld8.mov", M, OpMXX6aHint (4, 0, 0, 0x03, 0),
+ {R1, MR3, IA64_OPND_LDXMOV}, EMPTY},
+
/* Integer load w/increment by register. */
#define LDINCREG(c,h) M, OpMXX6aHint (4, 1, 0, c, h), {R1, MR3, R2}, POSTINC, 0, NULL
{"ld1", LDINCREG (0x00, 0)},
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